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  • Category : VHDL-FPGA-Verilog
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  • Update : 2015-05-19
  • Size : 359kb
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Introduction - If you have any usage issues, please Google them yourself
VHDL language to achieve a serial lock
Packet file list
(Preview for download)


lock2\coded_lock.qpf
.....\coded_lock.qsf
.....\coded_lock.qws
.....\coded_lock.vhd
.....\coded_lock.vhd.bak
.....\db\.cmp.kpt
.....\..\coded_lock.ace_cmp.cdb
.....\..\coded_lock.ace_cmp.hdb
.....\..\coded_lock.asm.qmsg
.....\..\coded_lock.asm.rdb
.....\..\coded_lock.asm_labs.ddb
.....\..\coded_lock.cbx.xml
.....\..\coded_lock.cmp.cdb
.....\..\coded_lock.cmp.hdb
.....\..\coded_lock.cmp.idb
.....\..\coded_lock.cmp.logdb
.....\..\coded_lock.cmp.rdb
.....\..\coded_lock.cmp0.ddb
.....\..\coded_lock.db_info
.....\..\coded_lock.eco.cdb
.....\..\coded_lock.eda.qmsg
.....\..\coded_lock.fit.qmsg
.....\..\coded_lock.hier_info
.....\..\coded_lock.hif
.....\..\coded_lock.logic_util_heuristic.dat
.....\..\coded_lock.lpc.html
.....\..\coded_lock.lpc.rdb
.....\..\coded_lock.lpc.txt
.....\..\coded_lock.map.cdb
.....\..\coded_lock.map.hdb
.....\..\coded_lock.map.logdb
.....\..\coded_lock.map.qmsg
.....\..\coded_lock.map.rdb
.....\..\coded_lock.pplq.rdb
.....\..\coded_lock.pre_map.hdb
.....\..\coded_lock.pti_db_list.ddb
.....\..\coded_lock.root_partition.map.reg_db.cdb
.....\..\coded_lock.routing.rdb
.....\..\coded_lock.rtlv.hdb
.....\..\coded_lock.rtlv_sg.cdb
.....\..\coded_lock.rtlv_sg_swap.cdb
.....\..\coded_lock.sld_design_entry.sci
.....\..\coded_lock.sld_design_entry_dsc.sci
.....\..\coded_lock.smart_action.txt
.....\..\coded_lock.sta.qmsg
.....\..\coded_lock.sta.rdb
.....\..\coded_lock.sta_cmp.5_slow.tdb
.....\..\coded_lock.tis_db_list.ddb
.....\..\coded_lock.vpr.ammdb
.....\..\prev_cmp_coded_lock.qmsg
.....\incremental_db\compiled_partitions\coded_lock.db_info
.....\..............\...................\coded_lock.root_partition.map.kpt
.....\..............\README
.....\output_files\coded_lock.asm.rpt
.....\............\coded_lock.done
.....\............\coded_lock.eda.rpt
.....\............\coded_lock.fit.rpt
.....\............\coded_lock.fit.smsg
.....\............\coded_lock.fit.summary
.....\............\coded_lock.flow.rpt
.....\............\coded_lock.jdi
.....\............\coded_lock.map.rpt
.....\............\coded_lock.map.summary
.....\............\coded_lock.pin
.....\............\coded_lock.pof
.....\............\coded_lock.pti_db_list.ddb
.....\............\coded_lock.sta.rpt
.....\............\coded_lock.sta.summary
.....\............\coded_lock.tis_db_list.ddb
.....\............\Waveform.vwf
.....\............\Waveform1.vwf
.....\simulation\modelsim\coded_lock.sft
.....\..........\........\coded_lock.vho
.....\..........\........\coded_lock_modelsim.xrf
.....\..........\........\coded_lock_vhd.sdo
.....\..........\qsim\coded_lock.do
.....\..........\....\coded_lock.msim.vcd
.....\..........\....\coded_lock.sft
.....\..........\....\coded_lock.vo
.....\..........\....\coded_lock_20150514180115.sim.vwf
.....\..........\....\coded_lock_20150514194559.sim.vwf
.....\..........\....\coded_lock_20150515164955.sim.vwf
.....\..........\....\coded_lock_modelsim.xrf
.....\..........\....\transcript
.....\..........\....\Waveform.vwf.vt
.....\..........\....\Waveform1.vwf.vt
.....\..........\....\work\_info
.....\..........\....\....\_lib.qdb
.....\..........\....\....\_lib1_1.qdb
.....\..........\....\....\_lib1_1.qpg
.....\..........\....\....\_lib1_1.qtl
.....\..........\....\....\_vmake
.....\Waveform.vwf
.....\simulation\qsim\work
.....\incremental_db\compiled_partitions
.....\simulation\modelsim
.....\..........\qsim
.....\db
.....\incremental_db
.....\output_files
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