The aim this project is to implement the functionality of a digital alarm clock on a FPGA. As soon as the FPGA is switched on, the clock starts. The alarm can be set using the dip-switches provided on the FPGA board. This is indicated through the LEDs of the corresponding dip switch. The counter keeps rolling and as soon as the alarm goes off, a buzzer like sound is magnified via a speaker.

Alarm
.....\alarm.bgn
.....\alarm.bit
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.....\alarm.drc
.....\Alarm.ise
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.....\Alarm.ntrc_log
.....\alarm.pad
.....\alarm.par
.....\alarm.pcf
.....\alarm.prj
.....\alarm.ptwx
.....\Alarm.restore
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.....\alarm.syr
.....\alarm.twr
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.....\Alarm.v
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.....\alarm_pad.csv
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.....\alarm_usage.xml
.....\Alarm_xdb
.....\.........\cst.xbcd
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