fpga Development board materia

Verilog
.......\Verilog程序
.......\...........\10实验十：利用语言实现按键和数码管显示
.......\...........\......................................\db
.......\...........\......................................\..\key_led.asm.qmsg
.......\...........\......................................\..\key_led.asm_labs.ddb
.......\...........\......................................\..\key_led.cbx.xml
.......\...........\......................................\..\key_led.cmp.cdb
.......\...........\......................................\..\key_led.cmp.hdb
.......\...........\......................................\..\key_led.cmp.kpt
.......\...........\......................................\..\key_led.cmp.logdb
.......\...........\......................................\..\key_led.cmp.rdb
.......\...........\......................................\..\key_led.cmp.tdb
.......\...........\......................................\..\key_led.cmp0.ddb
.......\...........\......................................\..\key_led.cmp2.ddb
.......\...........\......................................\..\key_led.db_info
.......\...........\......................................\..\key_led.eco.cdb
.......\...........\......................................\..\key_led.fit.qmsg
.......\...........\......................................\..\key_led.hier_info
.......\...........\......................................\..\key_led.hif
.......\...........\......................................\..\key_led.lpc.html
.......\...........\......................................\..\key_led.lpc.rdb
.......\...........\......................................\..\key_led.lpc.txt
.......\...........\......................................\..\key_led.map.cdb
.......\...........\......................................\..\key_led.map.hdb
.......\...........\......................................\..\key_led.map.logdb
.......\...........\......................................\..\key_led.map.qmsg
.......\...........\......................................\..\key_led.pre_map.cdb
.......\...........\......................................\..\key_led.pre_map.hdb
.......\...........\......................................\..\key_led.rtlv.hdb
.......\...........\......................................\..\key_led.rtlv_sg.cdb
.......\...........\......................................\..\key_led.rtlv_sg_swap.cdb
.......\...........\......................................\..\key_led.sgdiff.cdb
.......\...........\......................................\..\key_led.sgdiff.hdb
.......\...........\......................................\..\key_led.sld_design_entry.sci
.......\...........\......................................\..\key_led.sld_design_entry_dsc.sci
.......\...........\......................................\..\key_led.syn_hier_info
.......\...........\......................................\..\key_led.tan.qmsg
.......\...........\......................................\..\key_led.tis_db_list.ddb
.......\...........\......................................\..\key_led.tmw_info
.......\...........\......................................\..\prev_cmp_key_led.asm.qmsg
.......\...........\......................................\..\prev_cmp_key_led.fit.qmsg
.......\...........\......................................\..\prev_cmp_key_led.map.qmsg
.......\...........\......................................\..\prev_cmp_key_led.qmsg
.......\...........\......................................\..\prev_cmp_key_led.tan.qmsg
.......\...........\......................................\incremental_db
.......\...........\......................................\..............\compiled_partitions
.......\...........\......................................\..............\...................\key_led.root_partition.map.kpt
.......\...........\......................................\..............\README
.......\...........\......................................\key_led.asm.rpt
.......\...........\......................................\key_led.cdf
.......\...........\......................................\key_led.done
.......\...........\

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