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jasonnemeth-projrtl

  • Category : VHDL-FPGA-Verilog
  • Tags :
  • Update : 2015-06-24
  • Size : 237kb
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  • Author :Di***
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Introduction - If you have any usage issues, please Google them yourself
8 bit processor for example
Packet file list
(Preview for download)


Model
.....\.DS_Store
__MACOSX
........\Model
........\.....\._.DS_Store
Model\8to256Decoder.vhd
.....\Adder.vhd
.....\ALU.vhd
.....\BigMux.vhd
.....\Controller.vhd
.....\data_types.vhd
.....\EdgeLatch.vhd
.....\FinalWaveform.wfs
.....\FullAdder.vhd
.....\HalfAdder.vhd
.....\Latch.vhd
.....\Latch8.vhd
.....\Memory.vhd
.....\microprocessor.scv
.....\microprocessor.sws
.....\microprocessor.sym
.....\..................\adder
.....\..................\.....\_adder_behav.dep
.....\..................\.....\_adder_behav.var
.....\..................\.....\_adder_struc.dep
.....\..................\.....\_adder_struc.var
.....\..................\.....\prim.dep
.....\..................\.....\prim.var
.....\..................\alu
.....\..................\...\_alu_behav.dep
.....\..................\...\_alu_behav.var
.....\..................\...\_alu_struc.dep
.....\..................\...\_alu_struc.var
.....\..................\...\prim.dep
.....\..................\...\prim.var
.....\..................\bigmux
.....\..................\......\_bigmux_behav.dep
.....\..................\......\_bigmux_behav.var
.....\..................\......\_bigmux_struc.dep
.....\..................\......\_bigmux_struc.var
.....\..................\......\prim.dep
.....\..................\......\prim.var
.....\..................\catalog.vlb
.....\..................\cfg_tb_top
.....\..................\..........\prim.dep
.....\..................\..........\prim.var
.....\..................\controller
.....\..................\..........\_controller_behav.dep
.....\..................\..........\_controller_behav.var
.....\..................\..........\_controller_struc.dep
.....\..................\..........\_controller_struc.var
.....\..................\..........\prim.dep
.....\..................\..........\prim.var
.....\..................\data_types
.....\..................\..........\_body.dep
.....\..................\..........\_body.var
.....\..................\..........\prim.dep
.....\..................\..........\prim.var
.....\..................\decoder8to256
.....\..................\.............\_decoder8to256_behav.dep
.....\..................\.............\_decoder8to256_behav.var
.....\..................\.............\prim.dep
.....\..................\.............\prim.var
.....\..................\edgelatch
.....\..................\.........\_edgelatch_behav.dep
.....\..................\.........\_edgelatch_behav.var
.....\..................\.........\prim.dep
.....\..................\.........\prim.var
.....\..................\fulladder
.....\..................\.........\_fulladder_struc.dep
.....\..................\.........\_fulladder_struc.var
.....\..................\.........\prim.dep
.....\..................\.........\prim.var
.....\..................\halfadder
.....\..................\.........\_halfadder_struc.dep
.....\..................\.........\_halfadder_struc.var
.....\..................\.........\prim.dep
.....\..................\.........\prim.var
.....\..................\latch
.....\..................\.....\_latch_behav.dep
.....\..................\.....\_latch_behav.var
.....\..................\.....\prim.dep
.....\..................\.....\prim.var
.....\..................\latch8
.....\..................\......\_latch8_struc.dep
.....\..................\......\_latch8_struc.var
.....\..................\......\prim.dep
.....\..................\......\prim.var
.....\..................\memory
.....\..................\......\_memory_behav.dep
.....\..................\......\_memory_behav.var
.....\..................\......\_memory_behav2.dep
.....\..................\......\_memory_behav2.var
.....\..................\......\_memory_struc.dep
.....\..................\......\_memory_struc.var
.....\..................\......\prim.dep
.....\..................\......\prim.var
.....\..................\memorywrap
.....\..................\..........\_memorywrap_behav.dep
.....\..................\..........\_memorywrap_behav.var
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