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  • Category : VHDL-FPGA-Verilog
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  • Update : 2015-07-07
  • Size : 3.07mb
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  • Author :杨****
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Introduction - If you have any usage issues, please Google them yourself
VGA dot matrix concept, the concept is to use lattice microcontroller, FPGA Play
Packet file list
(Preview for download)


vga_2
.....\db
.....\..\logic_util_heursitic.dat
.....\..\prev_cmp_vga_module.qmsg
.....\..\vga_module.amm.cdb
.....\..\vga_module.asm.qmsg
.....\..\vga_module.asm.rdb
.....\..\vga_module.asm_labs.ddb
.....\..\vga_module.cbx.xml
.....\..\vga_module.cmp.bpm
.....\..\vga_module.cmp.cdb
.....\..\vga_module.cmp.hdb
.....\..\vga_module.cmp.kpt
.....\..\vga_module.cmp.logdb
.....\..\vga_module.cmp.rdb
.....\..\vga_module.cmp_merge.kpt
.....\..\vga_module.cycloneive_io_sim_cache.31um_ff_1200mv_0c_fast.hsd
.....\..\vga_module.cycloneive_io_sim_cache.31um_ss_1200mv_0c_slow.hsd
.....\..\vga_module.cycloneive_io_sim_cache.31um_ss_1200mv_85c_slow.hsd
.....\..\vga_module.db_info
.....\..\vga_module.fit.qmsg
.....\..\vga_module.hier_info
.....\..\vga_module.hif
.....\..\vga_module.idb.cdb
.....\..\vga_module.lpc.html
.....\..\vga_module.lpc.rdb
.....\..\vga_module.lpc.txt
.....\..\vga_module.map.bpm
.....\..\vga_module.map.cdb
.....\..\vga_module.map.hdb
.....\..\vga_module.map.kpt
.....\..\vga_module.map.logdb
.....\..\vga_module.map.qmsg
.....\..\vga_module.map_bb.cdb
.....\..\vga_module.map_bb.hdb
.....\..\vga_module.map_bb.logdb
.....\..\vga_module.pre_map.cdb
.....\..\vga_module.pre_map.hdb
.....\..\vga_module.rtlv.hdb
.....\..\vga_module.rtlv_sg.cdb
.....\..\vga_module.rtlv_sg_swap.cdb
.....\..\vga_module.sgdiff.cdb
.....\..\vga_module.sgdiff.hdb
.....\..\vga_module.sld_design_entry.sci
.....\..\vga_module.sld_design_entry_dsc.sci
.....\..\vga_module.smart_action.txt
.....\..\vga_module.sta.qmsg
.....\..\vga_module.sta.rdb
.....\..\vga_module.sta_cmp.8_slow_1200mv_85c.tdb
.....\..\vga_module.syn_hier_info
.....\..\vga_module.tis_db_list.ddb
.....\..\vga_module.tiscmp.fast_1200mv_0c.ddb
.....\..\vga_module.tiscmp.fastest_slow_1200mv_0c.ddb
.....\..\vga_module.tiscmp.fastest_slow_1200mv_85c.ddb
.....\..\vga_module.tiscmp.slow_1200mv_0c.ddb
.....\..\vga_module.tiscmp.slow_1200mv_85c.ddb
.....\..\vga_module.tmw_info
.....\incremental_db
.....\..............\README
.....\..............\compiled_partitions
.....\..............\...................\vga_module.db_info
.....\..............\...................\vga_module.root_partition.cmp.cdb
.....\..............\...................\vga_module.root_partition.cmp.dfp
.....\..............\...................\vga_module.root_partition.cmp.hdb
.....\..............\...................\vga_module.root_partition.cmp.kpt
.....\..............\...................\vga_module.root_partition.cmp.logdb
.....\..............\...................\vga_module.root_partition.cmp.rcfdb
.....\..............\...................\vga_module.root_partition.map.cdb
.....\..............\...................\vga_module.root_partition.map.dpi
.....\..............\...................\vga_module.root_partition.map.hbdb.cdb
.....\..............\...................\vga_module.root_partition.map.hbdb.hb_info
.....\..............\...................\vga_module.root_partition.map.hbdb.hdb
.....\..............\...................\vga_module.root_partition.map.hbdb.sig
.....\..............\...................\vga_module.root_partition.map.hdb
.....\..............\...................\vga_module.root_partition.map.kpt
.....\sync_moudle.v
.....\sync_moudle.v.bak
.....\vga_control_module.v
.....\vga_control_module.v.bak
.....\vga_module.asm.rpt
.....\vga_module.done
.....\vga_module.fit.rpt
.....\vga_module.fit.smsg
.....\vga_module.fit.summary
.....\vga_module.flow.rpt
.....\vga_module.map.rpt
.....\vga_module.map.summary
.....\vga_module.pin
.....\vga_module.qpf
.....\vga_module.qsf
.....\vga_module.sof
.....\vga_module.sta.rpt
.....\vga_module.sta.summary
.....\vga_module.v
.....\vga_module.v.bak
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