asynchronous emif，16bit，FPGA program

emif
....\emif.gise
....\emif.xise
....\emif_top.v
....\emif_top_summary.html
....\ipcore_dir
....\..........\coregen.cgp
....\..........\coregen.log
....\..........\create_fifo_16X16.tcl
....\..........\create_ram.tcl
....\..........\create_ram16X16.tcl
....\..........\edit_ram.tcl
....\..........\emif_ram_data.coe
....\..........\emif_ram_data.coe.bak
....\..........\ram
....\..........\ram.asy
....\..........\ram.gise
....\..........\ram.mif
....\..........\ram.ngc
....\..........\ram.sym
....\..........\ram.v
....\..........\ram.veo
....\..........\ram.xco
....\..........\ram.xise
....\..........\ram16X16
....\..........\ram16X16.asy
....\..........\ram16X16.gise
....\..........\ram16X16.mif
....\..........\ram16X16.ngc
....\..........\ram16X16.sym
....\..........\ram16X16.v
....\..........\ram16X16.veo
....\..........\ram16X16.xco
....\..........\ram16X16.xise
....\..........\........\blk_mem_gen_v7_3_readme.txt
....\..........\........\doc
....\..........\........\...\blk_mem_gen_v7_3_vinfo.html
....\..........\........\...\pg058-blk-mem-gen.pdf
....\..........\........\example_design
....\..........\........\..............\ram16X16_exdes.ucf
....\..........\........\..............\ram16X16_exdes.vhd
....\..........\........\..............\ram16X16_exdes.xdc
....\..........\........\..............\ram16X16_prod.vhd
....\..........\........\implement
....\..........\........\.........\implement.bat
....\..........\........\.........\implement.sh
....\..........\........\.........\planAhead_ise.bat
....\..........\........\.........\planAhead_ise.sh
....\..........\........\.........\planAhead_ise.tcl
....\..........\........\.........\xst.prj
....\..........\........\.........\xst.scr
....\..........\........\simulation
....\..........\........\..........\addr_gen.vhd
....\..........\........\..........\bmg_stim_gen.vhd
....\..........\........\..........\bmg_tb_pkg.vhd
....\..........\........\..........\checker.vhd
....\..........\........\..........\data_gen.vhd
....\..........\........\..........\functional
....\..........\........\..........\..........\simcmds.tcl
....\..........\........\..........\..........\simulate_isim.bat
....\..........\........\..........\..........\simulate_mti.bat
....\..........\........\..........\..........\simulate_mti.do
....\..........\........\..........\..........\simulate_mti.sh
....\..........\........\..........\..........\simulate_ncsim.sh
....\..........\........\..........\..........\simulate_vcs.sh
....\..........\........\..........\..........\ucli_commands.key
....\..........\........\..........\..........\vcs_session.tcl
....\..........\........\..........\..........\wave_mti.do
....\..........\........\..........\..........\wave_ncsim.sv
....\..........\........\..........\ram16X16_synth.vhd
....\..........\........\..........\ram16X16_tb.vhd
....\..........\........\..........\random.vhd
....\..........\........\..........\timing
....\..........\........\..........\......\simcmds.tcl
....\..........\........\..........\......\simulate_isim.bat
....\..........\........\..........\......\simulate_mti.bat
....\..........\........\..........\......\simulate_mti.do
....\..........\........\..........\......\simulate_mti.sh
....\..........\........\..........\......\simulate_ncsim.sh
....\..........\........\..........\......\simulate_vcs.sh
....\..........\........\..........\......\ucli_commands.key
....\..........\........\..........\......\vcs_session.tcl
....\..........\........\..........\......\wave_mti.do
....\..........\........\..........\......\wave_ncsim.sv
....\..........\ram16X16_flist.txt
....\..........\ram16X16_xmdf.tcl
....\..........\...\blk_mem_gen_v7_3_readme.txt
....\..........\...\doc
....\..........\...\...\blk_mem_gen_v7_3_vinfo.html
....\..........\...\...\pg058-blk-mem-gen.pdf
....\..........\...\example_design
....\..........\...\..............\ram_exdes.ucf
....\..........\...\..............\ram_exdes.vhd
....\..........\...\..............\ram_exdes.xdc
....\..........\...\..............\ram_prod.vhd
....\..........\...\implement
....\...

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