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  • Category : VHDL-FPGA-Verilog
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  • Update : 2015-07-27
  • Size : 615kb
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  • Author :陈**
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Introduction - If you have any usage issues, please Google them yourself
The design is based on a program EP4CE15F17C8N and ADS8323 16-bit ADC data acquisition and display of 12864
Packet file list
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ADS8323\ADS8323_cmd_control.v
.......\ADS8323_function.v
.......\ADS8323_function.v.bak
.......\ADS8323_module.v
.......\ADS8323_module.v.bak
debounce_module\debounce_module.v
...............\debounce_module.v.bak
...............\delay_module.v
...............\delay_module.v.bak
...............\detect_module.v
...............\detect_module.v.bak
greybox_tmp\cbx_args.txt
incremental_db\README
..............\compiled_partitions\DAC.db_info
..............\...................\DAC.root_partition.cmp.cdb
..............\...................\DAC.root_partition.cmp.dfp
..............\...................\DAC.root_partition.cmp.hdb
..............\...................\DAC.root_partition.cmp.kpt
..............\...................\DAC.root_partition.cmp.logdb
..............\...................\DAC.root_partition.cmp.rcfdb
..............\...................\DAC.root_partition.map.cdb
..............\...................\DAC.root_partition.map.dpi
..............\...................\DAC.root_partition.map.hbdb.cdb
..............\...................\DAC.root_partition.map.hbdb.hb_info
..............\...................\DAC.root_partition.map.hbdb.hdb
..............\...................\DAC.root_partition.map.hbdb.sig
..............\...................\DAC.root_partition.map.hdb
..............\...................\DAC.root_partition.map.kpt
LCD\clock_rom_module.qip
...\lcd_control_module.v
...\lcd_module.v
...\lcd_module.v.bak
...\spi_write_module\spi_write_module.v
...\................\spi_write_module.v.bak
...\initial_module\lcd_initial_control_module.v
...\..............\lcd_initial_module.v
...\draw_module\lcd_draw_control_module.v
...\...........\lcd_draw_module.v
...\...........\lcd_firstDisplay_control_module.v
...\...........\pika_rom_module\clock_rom_module.qip
...\...........\...............\clock_rom_module.v
...\...........\...............\clock_rom_module.v.bak
...\...........\...............\clock_rom_module_bb.v
...\...........\...............\pika_face_mif\clock.hex
...\...........\...............\.............\greybox_tmp\cbx_args.txt
...\...........\...............\greybox_tmp\cbx_args.txt
ADC_module.v
clock_rom_module.qip
DAC.asm.rpt
DAC.cdf
DAC.done
DAC.fit.rpt
DAC.fit.smsg
DAC.fit.summary
DAC.flow.rpt
DAC.map.rpt
DAC.map.smsg
DAC.map.summary
DAC.pin
DAC.pof
DAC.qpf
DAC.qsf
DAC.sof
DAC.sta.rpt
DAC.sta.summary
dac_module.v.bak
sopc_builder_log.txt
voltage_change_module.v
voltage_change_module.v.bak
voltage_control_module.v
voltage_control_module.v.bak
voltage_handle_module.v
voltage_handle_module.v.bak
LCD\draw_module\pika_rom_module\pika_face_mif\greybox_tmp
...\...........\...............\pika_face_mif
...\...........\...............\greybox_tmp
...\...........\pika_rom_module
incremental_db\compiled_partitions
LCD\spi_write_module
...\initial_module
...\draw_module
ADS8323
debounce_module
greybox_tmp
incremental_db
LCD
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