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Location : Home Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
  • Category : VHDL-FPGA-Verilog
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  • Update : 2015-08-11
  • Size : 869kb
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  • Author :华***
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Introduction - If you have any usage issues, please Google them yourself
A AES ALGORITHM
Packet file list
(Preview for download)


AES
...\aes.v
...\AESWORK
...\.......\aes
...\.......\...\verilog.asm
...\.......\...\verilog.rw
...\.......\...\_primary.dat
...\.......\...\_primary.dbs
...\.......\...\_primary.vhd
...\.......\byte_mixcolum
...\.......\.............\verilog.asm
...\.......\.............\verilog.rw
...\.......\.............\_primary.dat
...\.......\.............\_primary.dbs
...\.......\.............\_primary.vhd
...\.......\keysched
...\.......\........\verilog.asm
...\.......\........\verilog.rw
...\.......\........\_primary.dat
...\.......\........\_primary.dbs
...\.......\........\_primary.vhd
...\.......\mixcolum
...\.......\........\verilog.asm
...\.......\........\verilog.rw
...\.......\........\_primary.dat
...\.......\........\_primary.dbs
...\.......\........\_primary.vhd
...\.......\sbox
...\.......\....\verilog.asm
...\.......\....\verilog.rw
...\.......\....\_primary.dat
...\.......\....\_primary.dbs
...\.......\....\_primary.vhd
...\.......\subbytes
...\.......\........\verilog.asm
...\.......\........\verilog.rw
...\.......\........\_primary.dat
...\.......\........\_primary.dbs
...\.......\........\_primary.vhd
...\.......\tb_top
...\.......\......\_primary.dat
...\.......\......\_primary.dbs
...\.......\......\_primary.vhd
...\.......\test_bench_top
...\.......\..............\verilog.asm
...\.......\..............\verilog.rw
...\.......\..............\_primary.dat
...\.......\..............\_primary.dbs
...\.......\..............\_primary.vhd
...\.......\wb_aes_controller
...\.......\.................\_primary.dat
...\.......\.................\_primary.dbs
...\.......\.................\_primary.vhd
...\.......\word_mixcolum
...\.......\.............\verilog.asm
...\.......\.............\verilog.rw
...\.......\.............\_primary.dat
...\.......\.............\_primary.dbs
...\.......\.............\_primary.vhd
...\.......\_info
...\.......\_temp
...\.......\.....\vlogb1aw5t
...\.......\.....\vlogyn1wb7
...\.......\_vmake
...\ASE.cr.mti
...\ASE.mpf
...\byte_mixcolum.v
...\keysched.v
...\mixcolum.v
...\sbox.v
...\subbytes.v
...\tb_top.v
...\test_bench_top.v
...\test_bench_top.v.bak
...\Untitled-1.v.bak
...\vsim.wlf
...\wave.do
...\wb_aescontroller.v
...\wlft8th1kz
...\word_mixcolum.v
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