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1602LCD_Verilog

  • Category : VHDL-FPGA-Verilog
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  • Update : 2015-09-07
  • Size : 396kb
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  • Author :chang*****
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Introduction - If you have any usage issues, please Google them yourself
Verilog 1602 display program source code is easy to understand
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1602LCD_Verilog\cmp_state.ini
...............\db\altsyncram_7i92.tdf
...............\..\altsyncram_9i92.tdf
...............\..\altsyncram_ph92.tdf
...............\..\cntr_9v7.tdf
...............\..\cntr_f29.tdf
...............\..\cntr_gv7.tdf
...............\..\cntr_hv7.tdf
...............\..\cntr_ln7.tdf
...............\..\cntr_no8.tdf
...............\..\cntr_vt9.tdf
...............\..\decode_9ie.tdf
...............\..\lcd_v.asm.qmsg
...............\..\lcd_v.asm_labs.ddb
...............\..\lcd_v.cbx.xml
...............\..\lcd_v.cmp.cdb
...............\..\lcd_v.cmp.hdb
...............\..\lcd_v.cmp.kpt
...............\..\lcd_v.cmp.logdb
...............\..\lcd_v.cmp.rdb
...............\..\lcd_v.cmp.tdb
...............\..\lcd_v.cmp0.ddb
...............\..\lcd_v.cmp2.ddb
...............\..\lcd_v.db_info
...............\..\lcd_v.eco.cdb
...............\..\lcd_v.fit.qmsg
...............\..\lcd_v.hier_info
...............\..\lcd_v.hif
...............\..\lcd_v.map.cdb
...............\..\lcd_v.map.hdb
...............\..\lcd_v.map.logdb
...............\..\lcd_v.map.qmsg
...............\..\lcd_v.map_bb.kpt
...............\..\lcd_v.pre_map.cdb
...............\..\lcd_v.pre_map.hdb
...............\..\lcd_v.rtlv.hdb
...............\..\lcd_v.rtlv_sg.cdb
...............\..\lcd_v.rtlv_sg_swap.cdb
...............\..\lcd_v.sgdiff.cdb
...............\..\lcd_v.sgdiff.hdb
...............\..\lcd_v.signalprobe.cdb
...............\..\lcd_v.sld_design_entry_dsc.sci
...............\..\lcd_v.smp_dump.txt
...............\..\lcd_v.syn_hier_info
...............\..\lcd_v.tan.qmsg
...............\..\lcd_v.tis_db_list.ddb
...............\..\lcd_v.tmw_info
...............\..\lcd_v_cmp.qrpt
...............\..\prev_cmp_lcd_v.asm.qmsg
...............\..\prev_cmp_lcd_v.fit.qmsg
...............\..\prev_cmp_lcd_v.map.qmsg
...............\..\prev_cmp_lcd_v.qmsg
...............\..\prev_cmp_lcd_v.tan.qmsg
...............\div16.bsf
...............\DIV16.v
...............\lcd.bsf
...............\lcd.v
...............\lcd_v.asm.rpt
...............\lcd_v.bdf
...............\lcd_v.cdf
...............\lcd_v.done
...............\lcd_v.fit.eqn
...............\lcd_v.fit.rpt
...............\lcd_v.fit.smsg
...............\lcd_v.fit.summary
...............\lcd_v.flow.rpt
...............\lcd_v.map.eqn
...............\lcd_v.map.rpt
...............\lcd_v.map.summary
...............\lcd_v.pin
...............\lcd_v.pof
...............\lcd_v.qpf
...............\lcd_v.qsf
...............\lcd_v.qws
...............\lcd_v.sof
...............\lcd_v.tan.rpt
...............\lcd_v.tan.summary
...............\lcd_v.vwf
...............\lcd_v_assignment_defaults.qdf
...............\undo_redo.txt
...............\db
1602LCD_Verilog
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