This Terasic HSMC-NET daughter sample program made by me, it demo how to use this daughter card.

SoCKit_NET
..........\.qsys_edit
..........\..........\filters.xml
..........\..........\layout.xml
..........\..........\preferences.xml
..........\..........\SoCKit_Qsys.xml
..........\c5_pin_model_dump.txt
..........\cio_dump_disallowed_lists.echo
..........\demo_batch
..........\..........\open_telnet.bat
..........\..........\SoCKit_ETHERNET_HSMC_Card.bat
..........\..........\SoCKit_ETHERNET_HSMC_Card.elf
..........\..........\SoCKit_ETHERNET_HSMC_Card.sh
..........\..........\SoCKit_ETHERNET_HSMC_Card.sof
..........\hc_output
..........\.........\SoCKit_ETHERNET_HSMC_Card.names_drv_tbl
..........\PLLJ_PLLSPE_INFO.txt
..........\SoCKit_ETHERNET_HSMC_Card.asm.rpt
..........\SoCKit_ETHERNET_HSMC_Card.cdf
..........\SoCKit_ETHERNET_HSMC_Card.done
..........\SoCKit_ETHERNET_HSMC_Card.dpf
..........\SoCKit_ETHERNET_HSMC_Card.fit.rpt
..........\SoCKit_ETHERNET_HSMC_Card.fit.smsg
..........\SoCKit_ETHERNET_HSMC_Card.fit.summary
..........\SoCKit_ETHERNET_HSMC_Card.flow.rpt
..........\SoCKit_ETHERNET_HSMC_Card.htm
..........\SoCKit_ETHERNET_HSMC_Card.jdi
..........\SoCKit_ETHERNET_HSMC_Card.map.rpt
..........\SoCKit_ETHERNET_HSMC_Card.map.smsg
..........\SoCKit_ETHERNET_HSMC_Card.map.summary
..........\SoCKit_ETHERNET_HSMC_Card.pin
..........\SoCKit_ETHERNET_HSMC_Card.qpf
..........\SoCKit_ETHERNET_HSMC_Card.qsf
..........\SoCKit_ETHERNET_HSMC_Card.qws
..........\SoCKit_ETHERNET_HSMC_Card.sdc
..........\SoCKit_ETHERNET_HSMC_Card.sof
..........\SoCKit_ETHERNET_HSMC_Card.sta.rpt
..........\SoCKit_ETHERNET_HSMC_Card.sta.summary
..........\SoCKit_ETHERNET_HSMC_Card.v
..........\SoCKit_ETHERNET_HSMC_Card.v.bak
..........\SoCKit_ETHERNET_HSMC_Card_assignment_defaults.qdf
..........\SoCKit_Qsys
..........\SoCKit_Qsys.bsf
..........\SoCKit_Qsys.cmp
..........\SoCKit_Qsys.html
..........\SoCKit_Qsys.qsys
..........\SoCKit_Qsys.sopcinfo
..........\...........\synthesis
..........\...........\.........\SoCKit_Qsys.debuginfo
..........\...........\.........\SoCKit_Qsys.qip
..........\...........\.........\SoCKit_Qsys.regmap
..........\...........\.........\SoCKit_Qsys.v
..........\...........\.........\submodules
..........\...........\.........\..........\afi_mux_ddr3_ddrx.v
..........\...........\.........\..........\altdq_dqs2_acv_cyclonev.sv
..........\...........\.........\..........\altera_avalon_dc_fifo.v
..........\...........\.........\..........\altera_avalon_mm_bridge.v
..........\...........\.........\..........\altera_avalon_mm_clock_crossing_bridge.v
..........\...........\.........\..........\altera_avalon_packets_to_master.v
..........\...........\.........\..........\altera_avalon_sc_fifo.v
..........\...........\.........\..........\altera_avalon_st_bytes_to_packets.v
..........\...........\.........\..........\altera_avalon_st_clock_crosser.v
..........\...........\.........\..........\altera_avalon_st_handshake_clock_crosser.v
..........\...........\.........\..........\altera_avalon_st_idle_inserter.v
..........\...........\.........\..........\altera_avalon_st_idle_remover.v
..........\...........\.........\..........\altera_avalon_st_jtag_interface.sdc
..........\...........\.........\..........\altera_avalon_st_jtag_interface.v
..........\...........\.........\..........\altera_avalon_st_packets_to_bytes.v
..........\...........\.........\..........\altera_avalon_st_pipeline_base.v
..........\...........\.........\..........\altera_dcfifo_synchronizer_bundle.v
..........\...........\.........\..........\altera_eth_tse_mac.sdc
..........\...........\.........\..........\altera_eth_tse_mac.v
..........\...........\.........\..........\altera_irq_clock_crosser.sv
..........\...........\.........\..........\altera_jtag_dc_streaming.v
..........\...........\.........\..........\altera_jtag_sld_node.v
..........\...........\.........\..........\altera_jtag_streaming.v
..........\...........\.........\..........\altera_mem_if_dll_cyclonev.sv
..........\...........\.........\..........\altera_mem_if_oct_cyclonev.sv
..........\...........\.........\..........\altera_mem_if_sequencer_cpu_cv_synth_cpu_inst.v
.........

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