i2c, veitlog, sda, sclk. very good as a study file.

i2c_hxj2\db\i2c_hxj2.amm.cdb
........\..\i2c_hxj2.asm.qmsg
........\..\i2c_hxj2.asm.rdb
........\..\i2c_hxj2.asm_labs.ddb
........\..\i2c_hxj2.cbx.xml
........\..\i2c_hxj2.cmp.cdb
........\..\i2c_hxj2.cmp.hdb
........\..\i2c_hxj2.cmp.kpt
........\..\i2c_hxj2.cmp.logdb
........\..\i2c_hxj2.cmp.rdb
........\..\i2c_hxj2.cmp0.ddb
........\..\i2c_hxj2.db_info
........\..\i2c_hxj2.eda.qmsg
........\..\i2c_hxj2.fit.qmsg
........\..\i2c_hxj2.hier_info
........\..\i2c_hxj2.hif
........\..\i2c_hxj2.idb.cdb
........\..\i2c_hxj2.lpc.html
........\..\i2c_hxj2.lpc.rdb
........\..\i2c_hxj2.lpc.txt
........\..\i2c_hxj2.map.cdb
........\..\i2c_hxj2.map.hdb
........\..\i2c_hxj2.map.logdb
........\..\i2c_hxj2.map.qmsg
........\..\i2c_hxj2.pre_map.cdb
........\..\i2c_hxj2.pre_map.hdb
........\..\i2c_hxj2.rtlv.hdb
........\..\i2c_hxj2.rtlv_sg.cdb
........\..\i2c_hxj2.rtlv_sg_swap.cdb
........\..\i2c_hxj2.sgdiff.cdb
........\..\i2c_hxj2.sgdiff.hdb
........\..\i2c_hxj2.sld_design_entry.sci
........\..\i2c_hxj2.sld_design_entry_dsc.sci
........\..\i2c_hxj2.smart_action.txt
........\..\i2c_hxj2.sta.qmsg
........\..\i2c_hxj2.sta.rdb
........\..\i2c_hxj2.sta_cmp.5_slow.tdb
........\..\i2c_hxj2.syn_hier_info
........\..\i2c_hxj2.tis_db_list.ddb
........\..\i2c_hxj2.tmw_info
........\..\logic_util_heursitic.dat
........\..\prev_cmp_i2c_hxj2.qmsg
........\i2c_hxj2.asm.rpt
........\i2c_hxj2.done
........\i2c_hxj2.eda.rpt
........\i2c_hxj2.fit.rpt
........\i2c_hxj2.fit.smsg
........\i2c_hxj2.fit.summary
........\i2c_hxj2.flow.rpt
........\i2c_hxj2.map.rpt
........\i2c_hxj2.map.summary
........\i2c_hxj2.pin
........\i2c_hxj2.pof
........\i2c_hxj2.qpf
........\i2c_hxj2.qsf
........\i2c_hxj2.sta.rpt
........\i2c_hxj2.sta.summary
........\i2c_hxj2_nativelink_simulation.rpt
........\i2c_slave.v
........\i2c_slave.v.bak
........\.ncremental_db\compiled_partitions\i2c_hxj2.db_info
........\..............\...................\i2c_hxj2.root_partition.map.kpt
........\..............\README
........\simulation\modelsim\i2c_hxj2.sft
........\..........\........\i2c_hxj2.vo
........\..........\........\i2c_hxj2.vt
........\..........\........\i2c_hxj2.vt.bak
........\..........\........\i2c_hxj2_modelsim.xrf
........\..........\........\i2c_hxj2_run_msim_rtl_verilog.do
........\..........\........\i2c_hxj2_run_msim_rtl_verilog.do.bak
........\..........\........\i2c_hxj2_run_msim_rtl_verilog.do.bak1
........\..........\........\i2c_hxj2_run_msim_rtl_verilog.do.bak2
........\..........\........\i2c_hxj2_v.sdo
........\..........\........\modelsim.ini
........\..........\........\msim_transcript
........\..........\........\rtl_work\i2c_hxj2\verilog.prw
........\..........\........\........\........\verilog.psm
........\..........\........\........\........\_primary.dat
........\..........\........\........\........\_primary.dbs
........\..........\........\........\........\_primary.vhd
........\..........\........\........\........_vlg_tst\verilog.prw
........\..........\........\........\................\verilog.psm
........\..........\........\........\................\_primary.dat
........\..........\........\........\................\_primary.dbs
........\..........\........\........\................\_primary.vhd
........\..........\........\........\_info
........\..........\........\........\_vmake
........\..........\........\test_I2C_to_GPIO.dmp
........\..........\........\vsim.wlf
........\..........\........\rtl_work\i2c_hxj2
........\..........\........\........\i2c_hxj2_vlg_tst
........\..........\........\........\_temp
........\..........\........\rtl_work
........\incremental_db\compiled_partitions
........\simulation\modelsim
........\db
........\incremental_db
........\simulation
i2c_hxj2

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