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ALINX9226_DB4CE15_restored

  • Category : VHDL-FPGA-Verilog
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  • Update : 2015-10-25
  • Size : 9.67mb
  • Downloaded :0次
  • Author :xuli****
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Introduction - If you have any usage issues, please Google them yourself
this is a program for FPGA to control AD9226, which is useful by verilog.
Packet file list
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ALINX9226_DB4CE15_restored
..........................\.qsys_edit
..........................\..........\filters.xml
..........................\..........\preferences.xml
..........................\AD.bsf
..........................\AD.v
..........................\AD.v.bak
..........................\AD1.v
..........................\AD1.v.bak
..........................\ADDA.asm.rpt
..........................\ADDA.bdf
..........................\ADDA.done
..........................\ADDA.fit.rpt
..........................\ADDA.fit.smsg
..........................\ADDA.fit.summary
..........................\ADDA.flow.rpt
..........................\ADDA.jdi
..........................\ADDA.map.rpt
..........................\ADDA.map.summary
..........................\ADDA.merge.rpt
..........................\ADDA.pin
..........................\ADDA.pof
..........................\ADDA.qpf
..........................\ADDA.qsf
..........................\ADDA.qws
..........................\ADDA.restore.rpt
..........................\ADDA.sof
..........................\ADDA.sta.rpt
..........................\ADDA.sta.summary
..........................\ADDA.tcl
..........................\ADDA.tcl.bak
..........................\ADDA_assignment_defaults.qdf
..........................\cpu1.sdc
..........................\cpu2.sdc
..........................\DA.v
..........................\db
..........................\..\ADDA.amm.cdb
..........................\..\ADDA.asm.qmsg
..........................\..\ADDA.asm.rdb
..........................\..\ADDA.asm_labs.ddb
..........................\..\ADDA.autoh_e4eb1.map.reg_db.cdb
..........................\..\ADDA.autos_3e921.map.reg_db.cdb
..........................\..\ADDA.cbx.xml
..........................\..\ADDA.cmp.bpm
..........................\..\ADDA.cmp.cdb
..........................\..\ADDA.cmp.hdb
..........................\..\ADDA.cmp.kpt
..........................\..\ADDA.cmp.logdb
..........................\..\ADDA.cmp.rdb
..........................\..\ADDA.cmp_merge.kpt
..........................\..\ADDA.cycloneive_io_sim_cache.45um_ff_1200mv_0c_fast.hsd
..........................\..\ADDA.cycloneive_io_sim_cache.45um_ss_1200mv_0c_slow.hsd
..........................\..\ADDA.cycloneive_io_sim_cache.45um_ss_1200mv_85c_slow.hsd
..........................\..\ADDA.db_info
..........................\..\ADDA.fit.qmsg
..........................\..\ADDA.hier_info
..........................\..\ADDA.hif
..........................\..\ADDA.idb.cdb
..........................\..\ADDA.lpc.html
..........................\..\ADDA.lpc.rdb
..........................\..\ADDA.lpc.txt
..........................\..\ADDA.map.bpm
..........................\..\ADDA.map.cdb
..........................\..\ADDA.map.hdb
..........................\..\ADDA.map.kpt
..........................\..\ADDA.map.logdb
..........................\..\ADDA.map.qmsg
..........................\..\ADDA.map.rdb
..........................\..\ADDA.map_bb.cdb
..........................\..\ADDA.map_bb.hdb
..........................\..\ADDA.map_bb.logdb
..........................\..\ADDA.pre_map.cdb
..........................\..\ADDA.pre_map.hdb
..........................\..\ADDA.root_partition.map.reg_db.cdb
..........................\..\ADDA.routing.rdb
..........................\..\ADDA.rtlv.hdb
..........................\..\ADDA.rtlv_sg.cdb
..........................\..\ADDA.rtlv_sg_swap.cdb
..........................\..\ADDA.sgdiff.cdb
..........................\..\ADDA.sgdiff.hdb
..........................\..\ADDA.sld_design_entry.sci
..........................\..\ADDA.sld_design_entry_dsc.sci
..........................\..\ADDA.smart_action.txt
..........................\..\ADDA.sta.qmsg
..........................\..\ADDA.sta.rdb
..........................\..\ADDA.sta_cmp.8_slow_1200mv_85c.tdb
..........................\..\ADDA.syn_hier_info
..........................\..\ADDA.tiscmp.fastest_slow_1200mv_0c.ddb
..........................\..\ADDA.tiscmp.fastest_slow_1200mv_85c.ddb
..........................\..\ADDA.tiscmp.fast_120
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