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  • Category : VHDL-FPGA-Verilog
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  • Update : 2015-12-15
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Introduction - If you have any usage issues, please Google them yourself
Its uart transmitter and receiver
Packet file list
(Preview for download)


uart_mm\crc_m.bsf
.......\crc_m.v
.......\crc_m.v.bak
.......\db\.cmp.kpt
.......\..\prev_cmp_uart_mm.qmsg
.......\..\uart_mm.asm.qmsg
.......\..\uart_mm.asm.rdb
.......\..\uart_mm.asm_labs.ddb
.......\..\uart_mm.cbx.xml
.......\..\uart_mm.cmp.bpm
.......\..\uart_mm.cmp.cdb
.......\..\uart_mm.cmp.hdb
.......\..\uart_mm.cmp.idb
.......\..\uart_mm.cmp.logdb
.......\..\uart_mm.cmp.rdb
.......\..\uart_mm.cmp_merge.kpt
.......\..\uart_mm.cycloneive_io_sim_cache.45um_ff_1200mv_0c_fast.hsd
.......\..\uart_mm.cycloneive_io_sim_cache.45um_ii_1200mv_0c_slow.hsd
.......\..\uart_mm.cycloneive_io_sim_cache.45um_ii_1200mv_85c_slow.hsd
.......\..\uart_mm.db_info
.......\..\uart_mm.fit.qmsg
.......\..\uart_mm.hier_info
.......\..\uart_mm.hif
.......\..\uart_mm.logic_util_heuristic.dat
.......\..\uart_mm.lpc.html
.......\..\uart_mm.lpc.rdb
.......\..\uart_mm.lpc.txt
.......\..\uart_mm.map.ammdb
.......\..\uart_mm.map.bpm
.......\..\uart_mm.map.cdb
.......\..\uart_mm.map.hdb
.......\..\uart_mm.map.kpt
.......\..\uart_mm.map.logdb
.......\..\uart_mm.map.qmsg
.......\..\uart_mm.map.rdb
.......\..\uart_mm.map_bb.cdb
.......\..\uart_mm.map_bb.hdb
.......\..\uart_mm.map_bb.logdb
.......\..\uart_mm.pplq.rdb
.......\..\uart_mm.pre_map.hdb
.......\..\uart_mm.pti_db_list.ddb
.......\..\uart_mm.root_partition.map.reg_db.cdb
.......\..\uart_mm.routing.rdb
.......\..\uart_mm.rtlv.hdb
.......\..\uart_mm.rtlv_sg.cdb
.......\..\uart_mm.rtlv_sg_swap.cdb
.......\..\uart_mm.sld_design_entry.sci
.......\..\uart_mm.sld_design_entry_dsc.sci
.......\..\uart_mm.smart_action.txt
.......\..\uart_mm.smp_dump.txt
.......\..\uart_mm.sta.qmsg
.......\..\uart_mm.sta.rdb
.......\..\uart_mm.sta_cmp.7_slow_1200mv_85c.tdb
.......\..\uart_mm.tiscmp.fast_1200mv_0c.ddb
.......\..\uart_mm.tiscmp.slow_1200mv_0c.ddb
.......\..\uart_mm.tiscmp.slow_1200mv_85c.ddb
.......\..\uart_mm.tis_db_list.ddb
.......\..\uart_mm.vpr.ammdb
.......\debounce.v
.......\debounce.v.bak
.......\fifo.v
.......\fifo_m.v
.......\fifo_m.v.bak
.......\incremental_db\compiled_partitions\uart_mm.db_info
.......\..............\...................\uart_mm.root_partition.cmp.ammdb
.......\..............\...................\uart_mm.root_partition.cmp.cdb
.......\..............\...................\uart_mm.root_partition.cmp.dfp
.......\..............\...................\uart_mm.root_partition.cmp.hdb
.......\..............\...................\uart_mm.root_partition.cmp.logdb
.......\..............\...................\uart_mm.root_partition.cmp.rcfdb
.......\..............\...................\uart_mm.root_partition.map.cdb
.......\..............\...................\uart_mm.root_partition.map.dpi
.......\..............\...................\uart_mm.root_partition.map.hbdb.cdb
.......\..............\...................\uart_mm.root_partition.map.hbdb.hb_info
.......\..............\...................\uart_mm.root_partition.map.hbdb.hdb
.......\..............\...................\uart_mm.root_partition.map.hbdb.sig
.......\..............\...................\uart_mm.root_partition.map.hdb
.......\..............\...................\uart_mm.root_partition.map.kpt
.......\..............\...................\uart_mm.rrp.hdb
.......\..............\README
.......\mod_m_counter.v
.......\output_files\uart_mm.asm.rpt
.......\............\uart_mm.done
.......\............\uart_mm.fit.rpt
.......\............\uart_mm.fit.smsg
.......\............\uart_mm.fit.summary
.......\............\uart_mm.flow.rpt
.......\............\uart_mm.jdi
.......\............\uart_mm.map.rpt
.......\............\uart_mm.map.smsg
.......\............\uart_mm.map.summary
.......\............\uart_mm.pin
.......\............\uart_mm.sof
.......\............\uart_mm.sta.rpt
.......\............\uart_mm.sta.summary
.......\simulation\crc\crc_m.cr.mti
.......\..........\...\crc_m.mpf
.......\..........\...\crc_test.v
.......\..........\...\crc_test.v.bak
.......\..........\...\vsim.wlf
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