Designed and implemented using the LUT lookup table verliog multipliers, through simulation by modelsim

lut_multiplier\db\altsyncram_hk81.tdf
..............\..\logic_util_heursitic.dat
..............\..\lut_multiplier_module.db_info
..............\..\prev_cmp_lut_multiplier_module.qmsg
..............\incremental_db\compiled_partitions\lut_multiplier_module.db_info
..............\..............\...................\lut_multiplier_module.root_partition.cmp.dfp
..............\..............\...................\lut_multiplier_module.root_partition.cmp.kpt
..............\..............\...................\lut_multiplier_module.root_partition.cmp.logdb
..............\..............\...................\lut_multiplier_module.root_partition.map.dpi
..............\..............\...................\lut_multiplier_module.root_partition.map.kpt
..............\..............\README
..............\lut_module\lut_module.v
..............\..........\lut_module.v.bak
..............\lut_multiplier_module.asm.rpt
..............\lut_multiplier_module.done
..............\lut_multiplier_module.eda.rpt
..............\lut_multiplier_module.fit.rpt
..............\lut_multiplier_module.fit.summary
..............\lut_multiplier_module.flow.rpt
..............\lut_multiplier_module.map.rpt
..............\lut_multiplier_module.map.summary
..............\lut_multiplier_module.pin
..............\lut_multiplier_module.pof
..............\lut_multiplier_module.qpf
..............\lut_multiplier_module.qsf
..............\lut_multiplier_module.sof
..............\lut_multiplier_module.tan.rpt
..............\lut_multiplier_module.tan.summary
..............\lut_multiplier_module.v
..............\lut_multiplier_module.v.bak
..............\lut_multiplier_module_assignment_defaults.qdf
..............\lut_multiplier_module_nativelink_simulation.rpt
..............\simulation\modelsim\lut_multiplier_module.rom0_lut_module_fd884332.hdl.mif
..............\..........\........\lut_multiplier_module.sft
..............\..........\........\lut_multiplier_module.vo
..............\..........\........\lut_multiplier_module.vt
..............\..........\........\lut_multiplier_module.vt.bak
..............\..........\........\lut_multiplier_module_modelsim.xrf
..............\..........\........\lut_multiplier_module_run_msim_rtl_verilog.do
..............\..........\........\lut_multiplier_module_v.sdo
..............\..........\........\modelsim.ini
..............\..........\........\msim_transcript
..............\..........\........\rtl_work\lut_module\verilog.prw
..............\..........\........\........\..........\verilog.psm
..............\..........\........\........\..........\_primary.dat
..............\..........\........\........\..........\_primary.dbs
..............\..........\........\........\..........\_primary.vhd
..............\..........\........\........\.....ultiplier_module\verilog.prw
..............\..........\........\........\.....................\verilog.psm
..............\..........\........\........\.....................\_primary.dat
..............\..........\........\........\.....................\_primary.dbs
..............\..........\........\........\.....................\_primary.vhd
..............\..........\........\........\....................._simulation\verilog.prw
..............\..........\........\........\................................\verilog.psm
..............\..........\........\........\................................\_primary.dat
..............\..........\........\........\................................\_primary.dbs
..............\..........\........\........\................................\_primary.vhd
..............\..........\........\........\_info
..............\..........\........\........\_vmake
..............\..........\........\vsim.wlf
..............\transcript
..............\simulation\modelsim\rtl_work\lut_module
..............\..........\........\........\lut_multiplier_module
..............\..........\........\........\lut_multiplier_module_simulation
..............\..........\........\........\_temp
..............\..........\........\rtl_work
..............\incremental_db\compiled_partitions
..............\simulat

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