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FPGAcode

  • Category : VHDL-FPGA-Verilog
  • Tags :
  • Update : 2015-12-31
  • Size : 4kb
  • Downloaded :0次
  • Author :w****
  • About : Nobody
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Introduction - If you have any usage issues, please Google them yourself
compare, division,half_clock,block and unblock
Packet file list
(Preview for download)


1\compare.v
.\comparetest.v
.\comparetest.v.bak
2\half_clk.v
.\top.v
3\fdivision.v
.\fdivision.v.bak
.\fdivision_top.v
.\fdivision_top.v.bak
4\blocking.v
.\blocking.v.bak
.\compareTop.v
.\non_blocking.v
5\alu.v
.\alu.v.bak
.\alutest.v
.\alutest.v.bak
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