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SDRAM-controler-based-on-the-FPGA

  • Category : VHDL-FPGA-Verilog
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  • Update : 2016-01-17
  • Size : 4.17mb
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  • Author :Prud*****
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Introduction - If you have any usage issues, please Google them yourself
In this case is to achieve SDRAM operating with FPGA devices, and use of language verilog hardware description language, I hope people can learn to play FPGA helpful
Packet file list
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基于FPGA的 SDR SDRAM控制器设计\SDRAM\db\logic_util_heursitic.dat
..............................\.....\..\prev_cmp_SDRAM.qmsg
..............................\.....\..\SDRAM.asm.qmsg
..............................\.....\..\SDRAM.asm.rdb
..............................\.....\..\SDRAM.asm_labs.ddb
..............................\.....\..\SDRAM.cbx.xml
..............................\.....\..\SDRAM.cmp.bpm
..............................\.....\..\SDRAM.cmp.cdb
..............................\.....\..\SDRAM.cmp.hdb
..............................\.....\..\SDRAM.cmp.idb
..............................\.....\..\SDRAM.cmp.kpt
..............................\.....\..\SDRAM.cmp.logdb
..............................\.....\..\SDRAM.cmp.rdb
..............................\.....\..\SDRAM.cmp_merge.kpt
..............................\.....\..\SDRAM.cycloneive_io_sim_cache.45um_ff_1200mv_0c_fast.hsd
..............................\.....\..\SDRAM.cycloneive_io_sim_cache.45um_ss_1200mv_0c_slow.hsd
..............................\.....\..\SDRAM.cycloneive_io_sim_cache.45um_ss_1200mv_85c_slow.hsd
..............................\.....\..\SDRAM.db_info
..............................\.....\..\SDRAM.eda.qmsg
..............................\.....\..\SDRAM.fit.qmsg
..............................\.....\..\SDRAM.hier_info
..............................\.....\..\SDRAM.hif
..............................\.....\..\SDRAM.ipinfo
..............................\.....\..\SDRAM.lpc.html
..............................\.....\..\SDRAM.lpc.rdb
..............................\.....\..\SDRAM.lpc.txt
..............................\.....\..\SDRAM.map.ammdb
..............................\.....\..\SDRAM.map.bpm
..............................\.....\..\SDRAM.map.cdb
..............................\.....\..\SDRAM.map.hdb
..............................\.....\..\SDRAM.map.kpt
..............................\.....\..\SDRAM.map.logdb
..............................\.....\..\SDRAM.map.qmsg
..............................\.....\..\SDRAM.map.rdb
..............................\.....\..\SDRAM.map_bb.cdb
..............................\.....\..\SDRAM.map_bb.hdb
..............................\.....\..\SDRAM.map_bb.logdb
..............................\.....\..\SDRAM.pplq.rdb
..............................\.....\..\SDRAM.pre_map.hdb
..............................\.....\..\SDRAM.pti_db_list.ddb
..............................\.....\..\SDRAM.root_partition.map.reg_db.cdb
..............................\.....\..\SDRAM.routing.rdb
..............................\.....\..\SDRAM.rtlv.hdb
..............................\.....\..\SDRAM.rtlv_sg.cdb
..............................\.....\..\SDRAM.rtlv_sg_swap.cdb
..............................\.....\..\SDRAM.sgdiff.cdb
..............................\.....\..\SDRAM.sgdiff.hdb
..............................\.....\..\SDRAM.sld_design_entry.sci
..............................\.....\..\SDRAM.sld_design_entry_dsc.sci
..............................\.....\..\SDRAM.smart_action.txt
..............................\.....\..\SDRAM.sta.qmsg
..............................\.....\..\SDRAM.sta.rdb
..............................\.....\..\SDRAM.sta_cmp.8_slow_1200mv_85c.tdb
..............................\.....\..\SDRAM.syn_hier_info
..............................\.....\..\SDRAM.tiscmp.fastest_slow_1200mv_0c.ddb
..............................\.....\..\SDRAM.tiscmp.fastest_slow_1200mv_85c.ddb
..............................\.....\..\SDRAM.tiscmp.fast_1200mv_0c.ddb
..............................\.....\..\SDRAM.tiscmp.slow_1200mv_0c.ddb
..............................\.....\..\SDRAM.tiscmp.slow_1200mv_85c.ddb
..............................\.....\..\SDRAM.tis_db_list.ddb
..............................\.....\..\SDRAM.vpr.ammdb
..............................\.....\incremental_db\compiled_partitions\SDRAM.db_info
..............................\.....\..............\...................\SDRAM.root_partition.cmp.ammdb
..............................\.....\..............\...................\SDRAM.root_partition.cmp.cdb
..............................\.....\..............\...................\SDRAM.root_par
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