The Verilog version of the code is in folder “fpu_double”, and the VHDL version is in folder “double_fpu”. There is a readme file in each folder, and a testbench file to simulate each core. These cores are designed to meet the IEEE 754 standard for double precision floating point arithmetic.

fpu_double\branches\Desktop_1.ini
..........\Desktop_1.ini
..........\tags\arelease\comppack.vhd
..........\....\........\Desktop_1.ini
..........\....\........\fpupack.vhd
..........\....\........\fpu_add.vhd
..........\....\........\fpu_div.vhd
..........\....\........\fpu_double.PDF
..........\....\........\fpu_double.vhd
..........\....\........\fpu_double_TB.vhd
..........\....\........\fpu_exceptions.vhd
..........\....\........\fpu_mul.vhd
..........\....\........\fpu_round.vhd
..........\....\........\fpu_sub.vhd
..........\....\........\Readme.txt
..........\....\Desktop_1.ini
..........\.runk\comppack.vhd
..........\.....\Desktop_1.ini
..........\.....\fpupack.vhd
..........\.....\fpu_add.vhd
..........\.....\fpu_div.vhd
..........\.....\fpu_double.PDF
..........\.....\fpu_double.vhd
..........\.....\fpu_double_TB.vhd
..........\.....\fpu_exceptions.vhd
..........\.....\fpu_mul.vhd
..........\.....\fpu_round.vhd
..........\.....\fpu_sub.vhd
..........\.....\Readme.txt
..........\web_uploads\Desktop_1.ini
..........\tags\arelease
..........\branches
..........\tags
..........\trunk
..........\web_uploads
fpu_double

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