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  • Category : VHDL-FPGA-Verilog
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  • Update : 2016-03-03
  • Size : 1.45mb
  • Downloaded :1次
  • Author :胡****
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Introduction - If you have any usage issues, please Google them yourself
This a PCI motion control card core code, I have a project program, easy to use, verilog language.
Packet file list
(Preview for download)


PCI_top
.......\base_addr_chk.v
.......\base_addr_chk.v.bak
.......\bkend_daemon.v
.......\config_mux.v
.......\config_mux.v.bak
.......\db
.......\..\logic_util_heursitic.dat
.......\..\pci_top.amm.cdb
.......\..\pci_top.cbx.xml
.......\..\pci_top.cmp.bpm
.......\..\pci_top.cmp.cdb
.......\..\pci_top.cmp.hdb
.......\..\pci_top.cmp.kpt
.......\..\pci_top.cmp.logdb
.......\..\pci_top.cmp.rdb
.......\..\pci_top.cmp_merge.kpt
.......\..\pci_top.cuda_io_sim_cache.31um_ss_1200mv_85c_slow.hsd
.......\..\pci_top.db_info
.......\..\pci_top.fit.qmsg
.......\..\pci_top.hier_info
.......\..\pci_top.hif
.......\..\pci_top.idb.cdb
.......\..\pci_top.lpc.html
.......\..\pci_top.lpc.rdb
.......\..\pci_top.lpc.txt
.......\..\pci_top.map.bpm
.......\..\pci_top.map.cdb
.......\..\pci_top.map.hdb
.......\..\pci_top.map.kpt
.......\..\pci_top.map.logdb
.......\..\pci_top.map.qmsg
.......\..\pci_top.map_bb.cdb
.......\..\pci_top.map_bb.hdb
.......\..\pci_top.map_bb.logdb
.......\..\pci_top.pre_map.cdb
.......\..\pci_top.pre_map.hdb
.......\..\pci_top.rtlv.hdb
.......\..\pci_top.rtlv_sg.cdb
.......\..\pci_top.rtlv_sg_swap.cdb
.......\..\pci_top.sgdiff.cdb
.......\..\pci_top.sgdiff.hdb
.......\..\pci_top.sld_design_entry.sci
.......\..\pci_top.sld_design_entry_dsc.sci
.......\..\pci_top.smart_action.txt
.......\..\pci_top.smp_dump.txt
.......\..\pci_top.syn_hier_info
.......\..\pci_top.tiscmp.slow_1200mv_85c.ddb
.......\..\pci_top.tis_db_list.ddb
.......\..\prev_cmp_pci_top.qmsg
.......\glue.v
.......\incremental_db
.......\..............\compiled_partitions
.......\..............\...................\pci_top.db_info
.......\..............\...................\pci_top.root_partition.cmp.cdb
.......\..............\...................\pci_top.root_partition.cmp.dfp
.......\..............\...................\pci_top.root_partition.cmp.hdb
.......\..............\...................\pci_top.root_partition.cmp.kpt
.......\..............\...................\pci_top.root_partition.cmp.logdb
.......\..............\...................\pci_top.root_partition.cmp.rcfdb
.......\..............\...................\pci_top.root_partition.map.cdb
.......\..............\...................\pci_top.root_partition.map.dpi
.......\..............\...................\pci_top.root_partition.map.hbdb.cdb
.......\..............\...................\pci_top.root_partition.map.hbdb.hb_info
.......\..............\...................\pci_top.root_partition.map.hbdb.hdb
.......\..............\...................\pci_top.root_partition.map.hbdb.sig
.......\..............\...................\pci_top.root_partition.map.hdb
.......\..............\...................\pci_top.root_partition.map.kpt
.......\..............\README
.......\pargen.v
.......\pci_clk_reset.v
.......\pci_stim.v
.......\pci_stim.v.bak
.......\pci_tb.v
.......\pci_top.done
.......\pci_top.fit.rpt
.......\pci_top.fit.smsg
.......\pci_top.fit.summary
.......\pci_top.flow.rpt
.......\pci_top.map.rpt
.......\pci_top.map.smsg
.......\pci_top.map.summary
.......\pci_top.pin
.......\pci_top.qpf
.......\pci_top.qsf
.......\pci_top.v
.......\pci_top.v.bak
.......\retry_count.v
.......\state_machine.v
.......\state_machine.v.bak
.......\tasks.v
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