Verilog Program for a 4bit Adder

Adder_4bit\_xmsgs
..........\......\netgen.xmsgs
..........\......\pn_parser.xmsgs
..........\......\xst.xmsgs
..........\Adder.cmd_log
..........\Adder.lso
..........\Adder.ngc
..........\Adder.ngr
..........\Adder.prj
..........\Adder.stx
..........\Adder.syr
..........\Adder.v
..........\Adder.xst
..........\Adder_4bit.gise
..........\Adder_4bit.xise
..........\Adder_envsettings.html
..........\Adder_summary.html
..........\Adder_xst.xrpt
..........\Addertest.v
..........\Addertest_beh.prj
..........\Addertest_isim_beh.exe
..........\Addertest_isim_beh.wdb
..........\Addertest_stx_beh.prj
..........\fuse.log
..........\fuse.xmsgs
..........\fuseRelaunch.cmd
..........\ipcore_dir
..........\..........\_xmsgs
..........\..........\......\cg.xmsgs
..........\..........\......\pn_parser.xmsgs
..........\..........\clk.v
..........\..........\clk.xaw
..........\..........\clk_arwz.ucf
..........\..........\clk_flist.txt
..........\..........\coregen.cgp
..........\..........\coregen.log
..........\..........\create_clk.tcl
..........\..........\create_memory.tcl
..........\..........\memory.asy
..........\..........\memory.gise
..........\..........\memory.ngc
..........\..........\memory.sym
..........\..........\memory.v
..........\..........\memory.veo
..........\..........\memory.xco
..........\..........\memory.xise
..........\..........\memory
..........\..........\......\blk_mem_gen_v7_1_readme.txt
..........\..........\......\doc
..........\..........\......\...\blk_mem_gen_ds512.pdf
..........\..........\......\...\blk_mem_gen_v7_1_vinfo.html
..........\..........\......\example_design
..........\..........\......\..............\memory_exdes.ucf
..........\..........\......\..............\memory_exdes.vhd
..........\..........\......\..............\memory_exdes.xdc
..........\..........\......\..............\memory_prod.vhd
..........\..........\......\implement
..........\..........\......\.........\implement.bat
..........\..........\......\.........\implement.sh
..........\..........\......\.........\planAhead_ise.bat
..........\..........\......\.........\planAhead_ise.sh
..........\..........\......\.........\planAhead_ise.tcl
..........\..........\......\.........\planAhead_rdn.bat
..........\..........\......\.........\planAhead_rdn.sh
..........\..........\......\.........\planAhead_rdn.tcl
..........\..........\......\.........\xst.prj
..........\..........\......\.........\xst.scr
..........\..........\......\simulation
..........\..........\......\..........\addr_gen.vhd
..........\..........\......\..........\bmg_stim_gen.vhd
..........\..........\......\..........\bmg_tb_pkg.vhd
..........\..........\......\..........\functional
..........\..........\......\..........\..........\simcmds.tcl
..........\..........\......\..........\..........\simulate_isim.bat
..........\..........\......\..........\..........\simulate_mti.bat
..........\..........\......\..........\..........\simulate_mti.do
..........\..........\......\..........\..........\simulate_mti.sh
..........\..........\......\..........\..........\simulate_ncsim.sh
..........\..........\......\..........\..........\simulate_vcs.sh
..........\..........\......\..........\..........\ucli_commands.key
..........\..........\......\..........\..........\vcs_session.tcl
..........\..........\......\..........\..........\wave_mti.do
..........\..........\......\..........\..........\wave_ncsim.sv
..........\..........\......\..........\memory_synth.vhd
..........\..........\......\..........\memory_tb.vhd
..........\..........\......\..........\random.vhd
..........\..........\......\..........\timing
..........\..........\......\..........\......\simcmds.tcl
..........\..........\......\..........\......\simulate_isim.bat
..........\..........\......\..........\......\simulate_mti.bat
..........\..........\......\..........\......\simulate_mti.do
..........\..........\......\..........\......\simulate_mti.sh
..........\..........\......\..........\......\simulate_ncsim.sh
..........\..........\......\..........\......\simulate_vcs.sh
..........

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