Verilog HDL control

verilog_led7\db\led_seg7.analyze_file.qmsg
............\..\led_seg7.db_info
............\..\led_seg7.eco.cdb
............\..\led_seg7.sld_design_entry.sci
............\led_seg7.asm.rpt
............\led_seg7.cdf
............\led_seg7.done
............\led_seg7.dpf
............\led_seg7.fit.rpt
............\led_seg7.fit.smsg
............\led_seg7.fit.summary
............\led_seg7.flow.rpt
............\led_seg7.map.rpt
............\led_seg7.map.summary
............\led_seg7.pin
............\led_seg7.pof
............\led_seg7.qpf
............\led_seg7.qsf
............\led_seg7.qws
............\led_seg7.tan.rpt
............\led_seg7.tan.summary
............\led_seg7.v
............\led_seg7_assignment_defaults.qdf
............\db
verilog_led7

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