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T5_led_7s

  • Category : VHDL-FPGA-Verilog
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  • Update : 2016-03-31
  • Size : 167kb
  • Downloaded :0次
  • Author :刘***
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7-segment LED for learning vhdl programming of great help, which is very important information
Packet file list
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T5_led_7s\cmp_state.ini
.........\db\led_7s.asm.qmsg
.........\..\led_7s.cbx.xml
.........\..\led_7s.cmp.cdb
.........\..\led_7s.cmp.hdb
.........\..\led_7s.cmp.logdb
.........\..\led_7s.cmp.rdb
.........\..\led_7s.cmp.tdb
.........\..\led_7s.cmp0.ddb
.........\..\led_7s.dbp
.........\..\led_7s.db_info
.........\..\led_7s.eco.cdb
.........\..\led_7s.fit.qmsg
.........\..\led_7s.hier_info
.........\..\led_7s.hif
.........\..\led_7s.map.cdb
.........\..\led_7s.map.hdb
.........\..\led_7s.map.logdb
.........\..\led_7s.map.qmsg
.........\..\led_7s.pre_map.cdb
.........\..\led_7s.pre_map.hdb
.........\..\led_7s.psp
.........\..\led_7s.pss
.........\..\led_7s.rtlv.hdb
.........\..\led_7s.rtlv_sg.cdb
.........\..\led_7s.rtlv_sg_swap.cdb
.........\..\led_7s.sgdiff.cdb
.........\..\led_7s.sgdiff.hdb
.........\..\led_7s.signalprobe.cdb
.........\..\led_7s.sld_design_entry.sci
.........\..\led_7s.sld_design_entry_dsc.sci
.........\..\led_7s.syn_hier_info
.........\..\led_7s.tan.qmsg
.........\..\led_7s.tis_db_list.ddb
.........\..\led_7s_cmp.qrpt
.........\..\prev_cmp_led_7s.asm.qmsg
.........\..\prev_cmp_led_7s.fit.qmsg
.........\..\prev_cmp_led_7s.map.qmsg
.........\..\prev_cmp_led_7s.qmsg
.........\..\prev_cmp_led_7s.tan.qmsg
.........\led_7s.asm.rpt
.........\led_7s.cdf
.........\led_7s.done
.........\led_7s.fit.eqn
.........\led_7s.fit.rpt
.........\led_7s.fit.smsg
.........\led_7s.fit.summary
.........\led_7s.flow.rpt
.........\led_7s.map.eqn
.........\led_7s.map.rpt
.........\led_7s.map.summary
.........\led_7s.pin
.........\led_7s.pof
.........\led_7s.qpf
.........\led_7s.qsf
.........\led_7s.qws
.........\led_7s.sof
.........\led_7s.tan.rpt
.........\led_7s.tan.summary
.........\led_7s.v
.........\led_7s_assignment_defaults.qdf
.........\db
T5_led_7s
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