The design is in strict accordance with the reality of the traffic light design using vhdl hardware description language, a traffic signal controller design, consists of a main road and branch roads merge into a crossroads at the entrance to each set of red, green and yellow color lights, red light no-go, the green light to allow passage, the yellow light to travel in a vehicle parked in the time to cut the line off-line. 2, red, green and yellow LEDs for lights. 3, the main road in the normally allows passage of state, branch roads to car traffic is permitted. A green light when the main road, branch roads red green light when the branch roads, main roads red. 4, the main, branch roads are car, alternating between the two to allow access, trunk release every 45 seconds, every branch roads clearance 25 seconds, and the establishment of 45 seconds, 25 seconds chronograph, the display circuit. 5, each time by a green light to red light conversion process, to bright yellow as a trans

EDA-FPGA课程设计-交通灯\traffic_light.rar
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EDA-FPGA课程设计-交通灯

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