Introduction - If you have any usage issues, please Google them yourself
library IEEE
use IEEE.std_logic_1164.all
entity encoder4_16 is
port ( d: in STD_LOGIC_VECTOR (3downto0)
q: out STD_LOGIC_VECTOR (15downto0))
end encoder4_16
architecture encoder_if of encoder4_16 is
begin
process(d)
begin
if d=