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CPU_single-(2)

  • Category : VHDL-FPGA-Verilog
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  • Update : 2016-04-14
  • Size : 2.3mb
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Single-cycle CPU design source code, based on Quatus II, pro-test available
Packet file list
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CPU_single
..........\CPU_single.done
..........\CPU_single.flow.rpt
..........\CPU_single.map.rpt
..........\CPU_single.map.smsg
..........\CPU_single.map.summary
..........\CPU_single.qpf
..........\CPU_single.qsf
..........\CPU_single.sim.rpt
..........\CPU_single.v
..........\CPU_single.v.bak
..........\CPU_single.vwf
..........\db
..........\..\CPU_single.cbx.xml
..........\..\CPU_single.cmp.rdb
..........\..\CPU_single.cmp_merge.kpt
..........\..\CPU_single.db_info
..........\..\CPU_single.eco.cdb
..........\..\CPU_single.eds_overflow
..........\..\CPU_single.fnsim.cdb
..........\..\CPU_single.fnsim.hdb
..........\..\CPU_single.fnsim.qmsg
..........\..\CPU_single.hier_info
..........\..\CPU_single.hif
..........\..\CPU_single.lpc.html
..........\..\CPU_single.lpc.rdb
..........\..\CPU_single.lpc.txt
..........\..\CPU_single.map.bpm
..........\..\CPU_single.map.cdb
..........\..\CPU_single.map.ecobp
..........\..\CPU_single.map.hdb
..........\..\CPU_single.map.kpt
..........\..\CPU_single.map.logdb
..........\..\CPU_single.map.qmsg
..........\..\CPU_single.map_bb.cdb
..........\..\CPU_single.map_bb.hdb
..........\..\CPU_single.map_bb.logdb
..........\..\CPU_single.pre_map.cdb
..........\..\CPU_single.pre_map.hdb
..........\..\CPU_single.ram0_Register_b87da43c.hdl.mif
..........\..\CPU_single.rtlv.hdb
..........\..\CPU_single.rtlv_sg.cdb
..........\..\CPU_single.rtlv_sg_swap.cdb
..........\..\CPU_single.sgdiff.cdb
..........\..\CPU_single.sgdiff.hdb
..........\..\CPU_single.sim.cvwf
..........\..\CPU_single.sim.hdb
..........\..\CPU_single.sim.qmsg
..........\..\CPU_single.sim.rdb
..........\..\CPU_single.simfam
..........\..\CPU_single.sld_design_entry.sci
..........\..\CPU_single.sld_design_entry_dsc.sci
..........\..\CPU_single.smart_action.txt
..........\..\CPU_single.syn_hier_info
..........\..\CPU_single.tan.qmsg
..........\..\CPU_single.tis_db_list.ddb
..........\..\logic_util_heursitic.dat
..........\..\mux_3nc.tdf
..........\..\mux_aqc.tdf
..........\..\mux_joc.tdf
..........\..\mux_ooc.tdf
..........\..\prev_cmp_CPU_single.map.qmsg
..........\..\prev_cmp_CPU_single.qmsg
..........\..\prev_cmp_CPU_single.sim.qmsg
..........\..\wed.wsf
..........\incremental_db
..........\..............\compiled_partitions
..........\..............\...................\CPU_single.root_partition.map.cdb
..........\..............\...................\CPU_single.root_partition.map.dpi
..........\..............\...................\CPU_single.root_partition.map.hdb
..........\..............\...................\CPU_single.root_partition.map.kpt
..........\..............\README
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