This project uses verilog HDL to realise counting 0 to 9999 on the 7-seg LED loaded on Xilinx Basys3 board.

SegSimplified
.............\.Xil
.............\test.cache
.............\..........\compile_simlib
.............\..........\wt
.............\..........\..\java_command_handlers.wdf
.............\..........\..\synthesis.wdf
.............\..........\..\synthesis_details.wdf
.............\..........\..\webtalk_pa.xml
.............\test.hw
.............\.......\hw_1
.............\.......\....\hw.xml
.............\.......\....\wave
.............\test.runs
.............\.........\.jobs
.............\.........\.....\vrs_config_1.xml
.............\.........\.....\vrs_config_2.xml
.............\.........\.....\vrs_config_3.xml
.............\.........\.....\vrs_config_4.xml
.............\.........\.....\vrs_config_5.xml
.............\.........\.....\vrs_config_6.xml
.............\.........\.....\vrs_config_7.xml
.............\.........\impl_1
.............\.........\......\.init_design.begin.rst
.............\.........\......\.init_design.end.rst
.............\.........\......\.opt_design.begin.rst
.............\.........\......\.opt_design.end.rst
.............\.........\......\.place_design.begin.rst
.............\.........\......\.place_design.end.rst
.............\.........\......\.route_design.begin.rst
.............\.........\......\.route_design.end.rst
.............\.........\......\.vivado.begin.rst
.............\.........\......\.vivado.end.rst
.............\.........\......\.Vivado_Implementation.queue.rst
.............\.........\......\.write_bitstream.begin.rst
.............\.........\......\.write_bitstream.end.rst
.............\.........\......\.Xil
.............\.........\......\gen_run.xml
.............\.........\......\htr.txt
.............\.........\......\init_design.pb
.............\.........\......\ISEWrap.js
.............\.........\......\ISEWrap.sh
.............\.........\......\opt_design.pb
.............\.........\......\place_design.pb
.............\.........\......\project.wdf
.............\.........\......\route_design.pb
.............\.........\......\rundef.js
.............\.........\......\runme.bat
.............\.........\......\runme.log
.............\.........\......\runme.sh
.............\.........\......\seg_simplified.bin
.............\.........\......\seg_simplified.bit
.............\.........\......\seg_simplified.tcl
.............\.........\......\seg_simplified.vdi
.............\.........\......\seg_simplified_80132.backup.vdi
.............\.........\......\seg_simplified_88192.backup.vdi
.............\.........\......\seg_simplified_clock_utilization_placed.rpt
.............\.........\......\seg_simplified_control_sets_placed.rpt
.............\.........\......\seg_simplified_drc_opted.rpt
.............\.........\......\seg_simplified_drc_routed.pb
.............\.........\......\seg_simplified_drc_routed.rpt
.............\.........\......\seg_simplified_io_placed.rpt
.............\.........\......\seg_simplified_opt.dcp
.............\.........\......\seg_simplified_placed.dcp
.............\.........\......\seg_simplified_power_routed.rpt
.............\.........\......\seg_simplified_power_summary_routed.pb
.............\.........\......\seg_simplified_routed.dcp
.............\.........\......\seg_simplified_route_status.pb
.............\.........\......\seg_simplified_route_status.rpt
.............\.........\......\seg_simplified_timing_summary_routed.rpt
.............\.........\......\seg_simplified_timing_summary_routed.rpx
.............\.........\......\seg_simplified_utilization_placed.pb
.............\.........\......\seg_simplified_utilization_placed.rpt
.............\.........\......\usage_statistics_webtalk.html
.............\.........\......\usage_statistics_webtalk.xml
.............\.........\......\vivado.jou
.............\.........\......\vivado.pb
.............\.........\......\vivado_80132.backup.jou
.............\.........\......\vivado_88192.backup.jou
.............\.........\......\write_bitstream.pb
.............\.........\synth_1
.............\.........\.......\.vivado.begin.rst
.............\.........\.......\.vivado.end.rst
.............\.........\.......\.Vivado_Sy

• We are an exchange download platform that only provides communication channels. The downloaded content comes from the internet. Except for download issues, please Google on your own.
• The downloaded content is provided for members to upload. If it unintentionally infringes on your copyright, please contact us.
• Please use Winrar for decompression tools
• If download fail, Try it againg or Feedback to us.
• If downloaded content did not match the introduction, Feedback to us，Confirm and will be refund.
• Before downloading, you can inquire through the uploaded person information

Nothing．