This zip file is a complete project which designed a virtual dice randomly. Besides, the random math using 8 registers to give a input to the control.

desex2\control.sv
......\control.sv~
......\control.tcl
......\control.tcl~
......\control_stim.sv
......\control_stim.sv~
......\dtype.sv
......\encoder.sv
......\encoder.sv~
......\encoder.tcl
......\encoder.tcl~
......\encoder_stim.sv
......\encoder_stim.sv~
......\INCA_libs
......\.........\irun.lnx86.14.10.nc
......\.........\...................\.nclib.lock
......\.........\...................\.ncrun.lock
......\.........\...................\.ncv.lock
......\.........\...................\.timestamp.ts
......\.........\...................\bind.lst.lnx86
......\.........\...................\cds.lib
......\.........\...................\cdsrun.lib
......\.........\...................\files.ts
......\.........\...................\hdl.var
......\.........\...................\hdlrun.var
......\.........\...................\ncelab.args
......\.........\...................\ncelab.env
......\.........\...................\ncelab.hrd
......\.........\...................\ncsim.args
......\.........\...................\ncsim.env
......\.........\...................\ncsim_restart.args
......\.........\...................\ncsim_restart.env
......\.........\...................\ncverilog.args
......\.........\...................\ncvlog.args
......\.........\...................\ncvlog.env
......\.........\...................\ncvlog.files
......\.........\...................\ncvlog.hrd
......\.........\...................\OVMHOME
......\.........\...................\temp
......\.........\...................\UVMHOME
......\.........\...................\xllibs
......\.........\snap.nc
......\.........\.......\.nclib.lock
......\.........\.......\.ncrun.lock
......\.........\.......\.ncv.lock
......\.........\.......\.timestamp.ts
......\.........\.......\bind.lst.lnx86
......\.........\.......\cds.lib
......\.........\.......\cdsrun.lib
......\.........\.......\files.ts
......\.........\.......\hdl.var
......\.........\.......\hdlrun.var
......\.........\.......\ncelab.args
......\.........\.......\ncelab.env
......\.........\.......\ncelab.hrd
......\.........\.......\ncsim.args
......\.........\.......\ncsim.env
......\.........\.......\ncsim_restart.args
......\.........\.......\ncsim_restart.env
......\.........\.......\ncverilog.args
......\.........\.......\ncvlog.args
......\.........\.......\ncvlog.env
......\.........\.......\ncvlog.files
......\.........\.......\ncvlog.hrd
......\.........\.......\OVMHOME
......\.........\.......\temp
......\.........\.......\UVMHOME
......\.........\.......\xllibs
......\.........\worklib
......\.........\.......\.cdsvmod
......\.........\.......\.inca.db.043.lnx86
......\.........\.......\cdsinfo.tag
......\.........\.......\control_stim
......\.........\.......\............\sv
......\.........\.......\encoder_stim
......\.........\.......\............\sv
......\.........\.......\inca.lnx86.043.pak
......\.........\.......\random_stim
......\.........\.......\...........\sv
......\ncverilog.key
......\ncverilog.log
......\random.sv
......\random.sv~
......\random.tcl
......\random.tcl~
......\random_sitiml.sv~
......\random_stim.sv
......\random_stim.sv~
......\simvision12450.diag
......\simvision17821.diag
......\test.sv
......\test.sv~
......\test.tcl
......\test_stim.sv
......\waves.shm
......\.........\waves.dsn
......\.........\waves.trn

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