Sequence simulator, VHDL description to complete the state machine simulation

序列仿真\db\prev_cmp_seq_reg.map.qmsg
........\..\prev_cmp_seq_reg.qmsg
........\..\prev_cmp_seq_reg.sim.qmsg
........\..\seq_reg.cbx.xml
........\..\seq_reg.cmp.rdb
........\..\seq_reg.cmp_merge.kpt
........\..\seq_reg.db_info
........\..\seq_reg.eco.cdb
........\..\seq_reg.eds_overflow
........\..\seq_reg.fnsim.cdb
........\..\seq_reg.fnsim.hdb
........\..\seq_reg.fnsim.qmsg
........\..\seq_reg.hier_info
........\..\seq_reg.hif
........\..\seq_reg.lpc.html
........\..\seq_reg.lpc.rdb
........\..\seq_reg.lpc.txt
........\..\seq_reg.map.bpm
........\..\seq_reg.map.cdb
........\..\seq_reg.map.ecobp
........\..\seq_reg.map.hdb
........\..\seq_reg.map.kpt
........\..\seq_reg.map.logdb
........\..\seq_reg.map.qmsg
........\..\seq_reg.map_bb.cdb
........\..\seq_reg.map_bb.hdb
........\..\seq_reg.map_bb.logdb
........\..\seq_reg.pre_map.cdb
........\..\seq_reg.pre_map.hdb
........\..\seq_reg.rpp.qmsg
........\..\seq_reg.rtlv.hdb
........\..\seq_reg.rtlv_sg.cdb
........\..\seq_reg.rtlv_sg_swap.cdb
........\..\seq_reg.sgate.rvd
........\..\seq_reg.sgate_sm.rvd
........\..\seq_reg.sgdiff.cdb
........\..\seq_reg.sgdiff.hdb
........\..\seq_reg.sim.cvwf
........\..\seq_reg.sim.hdb
........\..\seq_reg.sim.qmsg
........\..\seq_reg.sim.rdb
........\..\seq_reg.simfam
........\..\seq_reg.sld_design_entry.sci
........\..\seq_reg.sld_design_entry_dsc.sci
........\..\seq_reg.smp_dump.txt
........\..\seq_reg.syn_hier_info
........\..\seq_reg.tis_db_list.ddb
........\..\seq_reg.tmw_info
........\..\wed.wsf
........\incremental_db\compiled_partitions\seq_reg.root_partition.map.atm
........\..............\...................\seq_reg.root_partition.map.dpi
........\..............\...................\seq_reg.root_partition.map.hdbx
........\..............\...................\seq_reg.root_partition.map.kpt
........\..............\README
........\seq_reg.done
........\seq_reg.flow.rpt
........\seq_reg.map.rpt
........\seq_reg.map.summary
........\seq_reg.qpf
........\seq_reg.qsf
........\seq_reg.qws
........\seq_reg.sim.rpt
........\seq_reg.vhd
........\seq_reg.vhd.bak
........\seq_reg.vwf
........\Waveform1.vwf
........\incremental_db\compiled_partitions
........\db
........\incremental_db
序列仿真

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