数字信号处理的fpga实现的书籍，较详细的介绍了fpga的知识，FPGA[1]是英文Field－Programmable Gate Array的缩写，即现场可编程门阵列，它是在PAL、GAL、CPLD等可编程器件的基础上进一步发展的产物。它

Packet : VHDL.rar filelist
VHDL/220MODEL.VHD
VHDL/220PACK.VHD
VHDL/ADD_1P.SCF
VHDL/ADD_1P.VHD
VHDL/ADD_2P.SCF
VHDL/ADD_2P.VHD
VHDL/ADD_3P.SCF
VHDL/ADD_3P.VHD
VHDL/ADD_FF8.VHD
VHDL/ADD_FF8CIN.VHD
VHDL/AMMOD.SCF
VHDL/AMMOD.VHD
VHDL/BFPROC.SCF
VHDL/BFPROC.VHD
VHDL/CASE3.VHD
VHDL/CASE3S.VHD
VHDL/CASE5P.VHD
VHDL/CCMUL.SCF
VHDL/CCMUL.VHD
VHDL/CIC3R32.SCF
VHDL/CIC3R32.VHD
VHDL/CIC3S32.SCF
VHDL/CIC3S32.VHD
VHDL/CORDIC.SCF
VHDL/CORDIC.VHD
VHDL/CSA7.VHD
VHDL/CSA7CIN.VHD
VHDL/DAFSM.SCF
VHDL/DAFSM.VHD
VHDL/DAPARA.SCF
VHDL/DAPARA.VHD
VHDL/DAROM.SCF
VHDL/DAROM.VHD
VHDL/DAROM3.MIF
VHDL/DASIGN.SCF
VHDL/DASIGN.VHD
VHDL/DB4LATTI.SCF
VHDL/DB4LATTI.VHD
VHDL/DB4POLY.SCF
VHDL/DB4POLY.VHD
VHDL/DIV_AEGP.SCF
VHDL/DIV_AEGP.VHD
VHDL/DIV_RES.SCF
VHDL/DIV_RES.VHD
VHDL/EXAMPLE.SCF
VHDL/EXAMPLE.VHD
VHDL/FIR6DLMS.SCF
VHDL/FIR6DLMS.VHD
VHDL/FIR_GEN.SCF
VHDL/FIR_GEN.VHD
VHDL/FIR_LMS.SCF
VHDL/FIR_LMS.VHD
VHDL/FIR_SRG.SCF
VHDL/FIR_SRG.VHD
VHDL/FUN_GRAF.GDF
VHDL/FUN_GRAF.SCF
VHDL/FUN_TEXT.SCF
VHDL/FUN_TEXT.VHD
VHDL/IIR.SCF
VHDL/IIR.VHD
VHDL/IIR_PAR.SCF
VHDL/IIR_PAR.VHD
VHDL/IIR_PIPE.SCF
VHDL/IIR_PIPE.VHD
VHDL/LFSR.SCF
VHDL/LFSR.VHD
VHDL/LFSR6S3.SCF
VHDL/LFSR6S3.VHD
VHDL/LPM.VHD
VHDL/LPM_PACK.VHD
VHDL/MTI_VHDL.DO
VHDL/MUL_SER.SCF
VHDL/MUL_SER.VHD
VHDL/RADER7.SCF
VHDL/RADER7.VHD
VHDL/SINE.MIF
VHDL/VHDL.FC2
VHDL

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