The first FPGA development and testing program for debugging DE1 development board

my_first_fpga
.............\PLLJ_PLLSPE_INFO.txt
.............\Waveform.vwf
.............\c5_pin_model_dump.txt
.............\couter_bus_mux.bsf
.............\couter_bus_mux.qip
.............\couter_bus_mux.v
.............\couter_bus_mux_bb.v
.............\db
.............\..\.cmp.kpt
.............\..\logic_util_heursitic.dat
.............\..\mux_sjc.tdf
.............\..\my_first_fpga.asm.qmsg
.............\..\my_first_fpga.asm.rdb
.............\..\my_first_fpga.cbx.xml
.............\..\my_first_fpga.cmp.bpm
.............\..\my_first_fpga.cmp.cdb
.............\..\my_first_fpga.cmp.hdb
.............\..\my_first_fpga.cmp.idb
.............\..\my_first_fpga.cmp.logdb
.............\..\my_first_fpga.cmp.rdb
.............\..\my_first_fpga.cmp_merge.kpt
.............\..\my_first_fpga.cyclonev_io_sim_cache.ff_0c_fast.hsd
.............\..\my_first_fpga.cyclonev_io_sim_cache.ff_85c_fast.hsd
.............\..\my_first_fpga.cyclonev_io_sim_cache.tt_0c_slow.hsd
.............\..\my_first_fpga.cyclonev_io_sim_cache.tt_85c_slow.hsd
.............\..\my_first_fpga.db_info
.............\..\my_first_fpga.eda.qmsg
.............\..\my_first_fpga.fit.qmsg
.............\..\my_first_fpga.hier_info
.............\..\my_first_fpga.hif
.............\..\my_first_fpga.ipinfo
.............\..\my_first_fpga.lpc.html
.............\..\my_first_fpga.lpc.rdb
.............\..\my_first_fpga.lpc.txt
.............\..\my_first_fpga.map.ammdb
.............\..\my_first_fpga.map.bpm
.............\..\my_first_fpga.map.cdb
.............\..\my_first_fpga.map.hdb
.............\..\my_first_fpga.map.kpt
.............\..\my_first_fpga.map.logdb
.............\..\my_first_fpga.map.qmsg
.............\..\my_first_fpga.map.rdb
.............\..\my_first_fpga.map_bb.cdb
.............\..\my_first_fpga.map_bb.hdb
.............\..\my_first_fpga.map_bb.logdb
.............\..\my_first_fpga.pplq.rdb
.............\..\my_first_fpga.pre_map.hdb
.............\..\my_first_fpga.pti_db_list.ddb
.............\..\my_first_fpga.root_partition.map.reg_db.cdb
.............\..\my_first_fpga.routing.rdb
.............\..\my_first_fpga.rtlv.hdb
.............\..\my_first_fpga.rtlv_sg.cdb
.............\..\my_first_fpga.rtlv_sg_swap.cdb
.............\..\my_first_fpga.sld_design_entry.sci
.............\..\my_first_fpga.sld_design_entry_dsc.sci
.............\..\my_first_fpga.smart_action.txt
.............\..\my_first_fpga.sta.qmsg
.............\..\my_first_fpga.sta.rdb
.............\..\my_first_fpga.sta_cmp.6_slow_1100mv_85c.tdb
.............\..\my_first_fpga.tis_db_list.ddb
.............\..\my_first_fpga.tiscmp.fast_1100mv_0c.ddb
.............\..\my_first_fpga.tiscmp.fast_1100mv_85c.ddb
.............\..\my_first_fpga.tiscmp.slow_1100mv_0c.ddb
.............\..\my_first_fpga.tiscmp.slow_1100mv_85c.ddb
.............\..\my_first_fpga.vpr.ammdb
.............\..\prev_cmp_my_first_fpga.qmsg
.............\greybox_tmp
.............\...........\cbx_args.txt
.............\...........\greybox_tmp
.............\hc_output
.............\.........\my_first_fpga.names_drv_tbl
.............\incremental_db
.............\..............\README
.............\..............\compiled_partitions
.............\..............\...................\my_first_fpga.db_info
.............\..............\...................\my_first_fpga.root_partition.cmp.ammdb
.............\..............\...................\my_first_fpga.root_partition.cmp.cdb
.............\..............\...................\my_first_fpga.root_partition.cmp.dfp
.............\..............\...................\my_first_fpga.root_partition.cmp.hbdb.cdb
.............\..............\...................\my_first_fpga.root_partition.cmp.hbdb.hdb
.............\..............\...................\my_first_fpga.root_partition.cmp.hbdb.sig
.............\..............\...................\my_first_fpga.root_partition.cmp.hdb
.............\..............\...................\my_first_fpga.root_partition.cmp.logdb
.............\..............\...................\my_first_fpga.root_partition.cmp.rcfdb
.............\..............\...................\my_first_fpga.root_partition.map.c

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