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  • Category : VHDL-FPGA-Verilog
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  • Update : 2016-08-29
  • Size : 10.91kb
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  • Author :13739095930@163.com
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Verilog编写,实现3DES加密过程。硬件实现
Packet file list
(Preview for download)
Packet : 3des.rar filelist
des_3_src_b/des.v
des_3_src_b/des_3.v
des_3_src_b/des_3_control.v
des_3_src_b/des_3_testbench.v
des_3_src_b/des_core.v
des_3_src_b/key_sel.v
des_3_src_b/s1.v
des_3_src_b/s2.v
des_3_src_b/s3.v
des_3_src_b/s4.v
des_3_src_b/s5.v
des_3_src_b/s6.v
des_3_src_b/s7.v
des_3_src_b/s8.v
des_3_src_b
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