The program is to take advantage of the sequential logic design method to design a 16-bit multiplier

mux16\db\mux16.asm.qmsg
.....\..\mux16.cbx.xml
.....\..\mux16.cmp.cdb
.....\..\mux16.cmp.hdb
.....\..\mux16.cmp.logdb
.....\..\mux16.cmp.rdb
.....\..\mux16.cmp.tdb
.....\..\mux16.cmp0.ddb
.....\..\mux16.dbp
.....\..\mux16.db_info
.....\..\mux16.eco.cdb
.....\..\mux16.eds_overflow
.....\..\mux16.fit.qmsg
.....\..\mux16.hier_info
.....\..\mux16.hif
.....\..\mux16.map.cdb
.....\..\mux16.map.hdb
.....\..\mux16.map.logdb
.....\..\mux16.map.qmsg
.....\..\mux16.pre_map.cdb
.....\..\mux16.pre_map.hdb
.....\..\mux16.psp
.....\..\mux16.pss
.....\..\mux16.rpp.qmsg
.....\..\mux16.rtlv.hdb
.....\..\mux16.rtlv_sg.cdb
.....\..\mux16.rtlv_sg_swap.cdb
.....\..\mux16.sgate.rvd
.....\..\mux16.sgate_sm.rvd
.....\..\mux16.sgdiff.cdb
.....\..\mux16.sgdiff.hdb
.....\..\mux16.signalprobe.cdb
.....\..\mux16.sim.cvwf
.....\..\mux16.sim.hdb
.....\..\mux16.sim.qmsg
.....\..\mux16.sim.rdb
.....\..\mux16.sld_design_entry.sci
.....\..\mux16.sld_design_entry_dsc.sci
.....\..\mux16.syn_hier_info
.....\..\mux16.tan.qmsg
.....\..\wed.wsf
.....\mux16.asm.rpt
.....\mux16.done
.....\mux16.fit.rpt
.....\mux16.fit.smsg
.....\mux16.fit.summary
.....\mux16.flow.rpt
.....\mux16.map.rpt
.....\mux16.map.smsg
.....\mux16.map.summary
.....\mux16.pin
.....\mux16.qpf
.....\mux16.qsf
.....\mux16.qws
.....\mux16.sim.rpt
.....\mux16.tan.rpt
.....\mux16.tan.summary
.....\mux16.v
.....\mux16.vwf
乘法器设计实验.pdf
mux16\db
mux16

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