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Verilog-IIC-read-MPU6050-Filter

  • Category : VHDL-FPGA-Verilog
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  • Update : 2016-09-04
  • Size : 9.06mb
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  • Author :魏***
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Introduction - If you have any usage issues, please Google them yourself
Verilog codes read 6 axis data of MPU6050, and use GY AZ AX with complementary filtering arithmetic to calculate X axis angle. Codes run at Altera Chip EP4C15F17C8 and set 2 led light if X angle beyond ±5°. Zip includes .v and .doc.
Packet file list
(Preview for download)


Verilog IIC璇籑PU6050-铻嶅悎婊ゆ尝-鍗曡酱-浠g爜-闅忕瑪
.......................................................\altera IP鏍哥畝鍗曚粙缁島g_altfp_mfug.pdf
.......................................................\div1_feng.zip
.......................................................\ModelSim10.1c绠
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