UART PORT VHDL USING DE2-115

.qsys_edit
..........\filters.xml
..........\preferences.xml
db
..\logic_util_heursitic.dat
..\prev_cmp_UART.qmsg
..\UART.db_info
..\UART.ipinfo
..\UART.sld_design_entry.sci
incremental_db
..............\compiled_partitions
..............\...................\UART.db_info
..............\...................\UART.root_partition.cmp.dfp
..............\...................\UART.root_partition.cmp.kpt
..............\...................\UART.root_partition.cmp.logdb
..............\...................\UART.root_partition.map.dpi
..............\...................\UART.root_partition.map.kpt
..............\README
output_files
............\UART.asm.rpt
............\UART.cdf
............\UART.done
............\UART.fit.rpt
............\UART.fit.smsg
............\UART.fit.summary
............\UART.flow.rpt
............\UART.jdi
............\UART.map.rpt
............\UART.map.summary
............\UART.pin
............\UART.sof
............\UART.sta.rpt
............\UART.sta.summary
RX.vhd
RX.vhd.bak
TX.vhd
UART.csv
UART.qpf
UART.qsf
UART.qws
UART.vhd
UART.vhd.bak
UART_assignment_defaults.qdf

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