Of FPGA NIOS 2 control SRAM. Altera' s FPGA model for the Cyclone 4.

05_NIOS_SRAM\.metadata\.lock
............\.........\.plugins\org.eclipse.cdt.managedbuilder.core\spec.c
............\.........\........\............rse.core\.log
............\.........\........\....................\initializerMarks\org.eclipse.rse.internal.core.RSELocalConnectionInitializer.mark
............\.........\........\................ui\.log
............\.qsys_edit\mysystem_schematic.nlv
............\software\UART_ANSIC\.force_relink
............\........\.....HAL\.force_relink
............\........\uart_int\.force_relink
............\........\........\obj\default\.force_relink
............\.metadata\.plugins\org.eclipse.core.resources\.projects\uart_int_bsp\.indexes\73\de\af
............\.........\........\..........................\.........\UART_ANSIC\.indexes\e8\de
............\.........\........\..........................\.........\..........\........\..\e4
............\.........\........\..........................\.........\.....HAL\.indexes\e8\de
............\.........\........\..........................\.........\........\........\..\e4
............\.........\........\..........................\.........\........_bsp\.indexes\73\de
............\.........\........\..........................\.........\uart_int\.indexes\e8\de
............\.........\........\..........................\.........\........\........\..\e4
............\.........\........\..........................\.........\........_bsp\.indexes\4b\de
............\.........\........\..........................\.........\............\........\73\de
............\.........\........\............ltk.core.refactoring\.refactorings\.workspace\2016\2\8
............\.........\........\................................\.............\uart_int\2016\2\8
............\.........\........\............core.resources\.projects\UART_ANSIC\.indexes\e8
............\.........\........\..........................\.........\.....HAL\.indexes\e8
............\.........\........\..........................\.........\........_bsp\.indexes\73
............\.........\........\..........................\.........\uart_int\.indexes\e8
............\.........\........\..........................\.........\........_bsp\.indexes\4b
............\.........\........\..........................\.........\............\........\73
............\.........\........\............ltk.core.refactoring\.refactorings\.workspace\2016\2
............\.........\........\................................\.............\uart_int\2016\2
............\.........\........\............core.resources\.projects\UART_ANSIC\.indexes
............\.........\........\..........................\.........\.........._bsp\.indexes
............\.........\........\..........................\.........\.....HAL\.indexes
............\.........\........\..........................\.........\........_bsp\.indexes
............\.........\........\..........................\.........\uart_int\.indexes
............\.........\........\..........................\.........\........_bsp\.indexes
............\.........\........\............ltk.core.refactoring\.refactorings\.workspace\2016
............\.........\........\................................\.............\uart_int\2016
............\.........\........\............rse.core\profiles\PRF.user-20151205ia_30723\FP.local.files_0
............\.........\........\....................\........\.........................\H.local_16
............\software\UART_ANSIC\obj\default\hardware\src
............\........\.....HAL\obj\default\hardware\src
............\........\uart_int\obj\default\hardware\src
............\.metadata\.plugins\org.eclipse.core.resources\.projects\UART_ANSIC
............\.........\........\..........................\.........\UART_ANSIC_bsp
............\.........\........\..........................\.........\UART_HAL
............\.........\........\..........................\.........\UART_HAL_bsp
............\.........\........\..........................\.........\uart_int
............\.........\........\..........................\.........\uart_int_bsp
............\......

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