USB+UART+I2C+VGA+ARM7+MC8051 Verrlog VHDL

IP核
....\ARM7-Verilog-HDL-IP-CORE
....\........................\ARM Verilog HDL IP CORE
....\........................\.......................\ABORTGenerator.vhd
....\........................\.......................\ABusMultiplexer.vhd
....\........................\.......................\ALU.vhd
....\........................\.......................\ALUTesterSim.vhd
....\........................\.......................\ARM7TDMIS_Top.vhd
....\........................\.......................\ARMALUTestTop.vhd
....\........................\.......................\ARMCoreSimTop.vhd
....\........................\.......................\ARMMultiplierTestTop.vhd
....\........................\.......................\ARMPackage.vhd
....\........................\.......................\ARMSMSSPackage.vhd
....\........................\.......................\ARMShifterTestTop.vhd
....\........................\.......................\ARMSimMemSubsystem.vhd
....\........................\.......................\AddressMux_Incrementer.vhd
....\........................\.......................\AdrCtrlReg.vhd
....\........................\.......................\BBusMultiplexer.vhd
....\........................\.......................\BusMonitor.vhd
....\........................\.......................\CLKENGenerator.vhd
....\........................\.......................\ClockAndResetGenerator.vhd
....\........................\.......................\ControlLogic.vhd
....\........................\.......................\CycleCounter.vhd
....\........................\.......................\DataMux.vhd
....\........................\.......................\DataOutMux.vhd
....\........................\.......................\Decoder.vhd
....\........................\.......................\IPDR.vhd
....\........................\.......................\LSAdrGen.vhd
....\........................\.......................\MSSCompPackage.vhd
....\........................\.......................\MemoryRemapper.vhd
....\........................\.......................\Mul32x8Comb.vhd
....\........................\.......................\MulCtrlAndRegs.vhd
....\........................\.......................\Multiplier.vhd
....\........................\.......................\MultiplierTestAdder.vhd
....\........................\.......................\MultiplierTesterSim.vhd
....\........................\.......................\PSR.vhd
....\........................\.......................\RAM32B.vhd
....\........................\.......................\ROMS19FR.vhd
....\........................\.......................\RegFile.vhd
....\........................\.......................\ResltBitMask.vhd
....\........................\.......................\S19FRPackage.vhd
....\........................\.......................\ShiftAmountReg.vhd
....\........................\.......................\Shifter.vhd
....\........................\.......................\ShifterTestbench.vhd
....\........................\.......................\ShifterTesterSim.vhd
....\........................\.......................\ThumbDecoder.vhd
....\USB+UART+I2C+VGA IP核
....\.....................\USB UART I2C VGA
....\.....................\................\I2C
....\.....................\................\...\I2C.dhp
....\.....................\................\...\I2C.npl
....\.....................\................\...\__projnav
....\.....................\................\...\.........\I2C.gfl
....\.....................\................\...\.........\I2C_flowplus.gfl
....\.....................\................\...\.........\coregen.rsp
....\.....................\................\...\.........\i2c_master_bit_ctrl.xst
....\.....................\................\...\.........\i2c_master_byte_ctrl.xst
....\.....................\................\...\.........\i2c_master_top.xst
....\.....................\................\...\.........\runXst_tcl.rsp
....\.....................\................\...\.........\xst_sprjTOstx_tcl.rsp
....\.....................\...............

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