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Category : VHDL-FPGA-Verilog
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- Update : 2016-11-12
- Size : 6kb
- Downloaded :0次
- Author :郭***
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Introduction - If you have any usage issues, please Google them yourself
1, design a by A, B both sides of the competition, there are three referees table tennis game.
2, with 8 (or more) LED lined up in a straight line to the midpoint of the border, on both sides of the position on behalf of both sides of the competition, in which a light LED indicates the current location of the ball, From left to right, or right to left, the speed of its movement should be able to adjust.
3, when the ball (the light of the LED) to move to the last of a party, the contestant should be able to decisively press the button on their side of the switch, which means starting racket hit. If hit, the ball moves in the opposite direction if not hit, then the other 1 point.
4, a party scoring, the circuit automatically rings for 3 seconds, during which the serve is invalid, and so can stop the ring after the game.
5, set the automatic scoring circuit, A, B, the two sides with two digital tube score points show that each of 21 points into a Board.
6, A and B each set up a l
Packet file list
(Preview for download)
程序\control.vhd
....\div2.vhd
....\en_control.vhd
....\faqiu.vhd
....\jifen1.vhd
....\led_control.vhd
....\xiangling1.vhd
程序
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