The FPGA internal fifo calls, use Verilog programming on it

class_fifo
..........\doc
..........\img
..........\prj
..........\...\db
..........\...\..\a_dpfifo_3u31.tdf
..........\...\..\a_dpfifo_ks31.tdf
..........\...\..\a_fefifo_08f.tdf
..........\...\..\a_gray2bin_ugb.tdf
..........\...\..\a_graycounter_n5c.tdf
..........\...\..\a_graycounter_qn6.tdf
..........\...\..\alt_synch_pipe_36d.tdf
..........\...\..\alt_synch_pipe_46d.tdf
..........\...\..\alt_synch_pipe_56d.tdf
..........\...\..\alt_synch_pipe_66d.tdf
..........\...\..\altsyncram_q0k1.tdf
..........\...\..\altsyncram_q3k1.tdf
..........\...\..\altsyncram_qu01.tdf
..........\...\..\cmpr_f66.tdf
..........\...\..\cntr_3ob.tdf
..........\...\..\cntr_fo7.tdf
..........\...\..\cntr_old.tdf
..........\...\..\dcfifo_t0i1.tdf
..........\...\..\dcfifo_v7h1.tdf
..........\...\..\dffpipe_1v8.tdf
..........\...\..\dffpipe_2v8.tdf
..........\...\..\dffpipe_3v8.tdf
..........\...\..\dffpipe_4v8.tdf
..........\...\..\dffpipe_5v8.tdf
..........\...\..\dffpipe_909.tdf
..........\...\..\dpram_4711.tdf
..........\...\..\dpram_j811.tdf
..........\...\..\fifo.amm.cdb
..........\...\..\fifo.asm.qmsg
..........\...\..\fifo.asm.rdb
..........\...\..\fifo.cbx.xml
..........\...\..\fifo.cmp.kpt
..........\...\..\fifo.cmp.rdb
..........\...\..\fifo.cmp_merge.kpt
..........\...\..\fifo.cycloneive_io_sim_cache.45um_ff_1200mv_0c_fast.hsd
..........\...\..\fifo.cycloneive_io_sim_cache.45um_ss_1200mv_0c_slow.hsd
..........\...\..\fifo.cycloneive_io_sim_cache.45um_ss_1200mv_85c_slow.hsd
..........\...\..\fifo.db_info
..........\...\..\fifo.eda.qmsg
..........\...\..\fifo.fit.qmsg
..........\...\..\fifo.hier_info
..........\...\..\fifo.hif
..........\...\..\fifo.idb.cdb
..........\...\..\fifo.lpc.html
..........\...\..\fifo.lpc.rdb
..........\...\..\fifo.lpc.txt
..........\...\..\fifo.map.bpm
..........\...\..\fifo.map.cdb
..........\...\..\fifo.map.hdb
..........\...\..\fifo.map.kpt
..........\...\..\fifo.map.logdb
..........\...\..\fifo.map.qmsg
..........\...\..\fifo.map.rdb
..........\...\..\fifo.map_bb.cdb
..........\...\..\fifo.map_bb.hdb
..........\...\..\fifo.map_bb.logdb
..........\...\..\fifo.pre_map.cdb
..........\...\..\fifo.pre_map.hdb
..........\...\..\fifo.root_partition.map.reg_db.cdb
..........\...\..\fifo.routing.rdb
..........\...\..\fifo.rtlv.hdb
..........\...\..\fifo.rtlv_sg.cdb
..........\...\..\fifo.rtlv_sg_swap.cdb
..........\...\..\fifo.sgdiff.cdb
..........\...\..\fifo.sgdiff.hdb
..........\...\..\fifo.sld_design_entry.sci
..........\...\..\fifo.sld_design_entry_dsc.sci
..........\...\..\fifo.smart_action.txt
..........\...\..\fifo.sta.qmsg
..........\...\..\fifo.sta.rdb
..........\...\..\fifo.syn_hier_info
..........\...\..\fifo.tis_db_list.ddb
..........\...\..\fifo.tiscmp.fast_1200mv_0c.ddb
..........\...\..\fifo.tiscmp.fastest_slow_1200mv_0c.ddb
..........\...\..\fifo.tiscmp.fastest_slow_1200mv_85c.ddb
..........\...\..\fifo.tiscmp.slow_1200mv_0c.ddb
..........\...\..\fifo.tiscmp.slow_1200mv_85c.ddb
..........\...\..\fifo.tmw_info
..........\...\..\logic_util_heursitic.dat
..........\...\..\prev_cmp_fifo.qmsg
..........\...\..\scfifo_0na1.tdf
..........\...\..\scfifo_foa1.tdf
..........\...\fifo.asm.rpt
..........\...\fifo.done
..........\...\fifo.eda.rpt
..........\...\fifo.fit.rpt
..........\...\fifo.fit.smsg
..........\...\fifo.fit.summary
..........\...\fifo.flow.rpt
..........\...\fifo.jdi
..........\...\fifo.map.rpt
..........\...\fifo.map.summary
..........\...\fifo.pin
..........\...\fifo.qip
..........\...\fifo.qpf

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