Introduction - If you have any usage issues, please Google them yourself
Clk divid module for the frequency circuit, the 50MHz system clock frequency to produce 50M/7Hz pixel clock. VGA control module for the VGA display control circuit module, driven by the pixel clock in the first line-frequency signal generation, and then the frequency of the signal frequency to produce 58Hz field frequency signal. As VS and HS signal has a strict timing matching, that is, the VS signal must be an integer multiple of HS signal to ensure that the field frequency signal is valid, can complete a few lines of scanning, the design of the use of the line frequency signal frequency count to generate Field frequency signal.