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xapp1246-multiboot-bpi

  • Category : VHDL-FPGA-Verilog
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  • Update : 2016-12-24
  • Size : 6.12mb
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Introduction - If you have any usage issues, please Google them yourself
K7 chip multi-core BPI BOOT source code and PDF description
Packet file list
(Preview for download)


readme.txt
multiboot_address_table\multiboot_address_table.tcl
ready_to_download\Bitstreams
.................\..........\Golden.bit
.................\..........\Update.bit
.................\..........\Update_corrupted.bit
.................\Golden_Update.mcs
.................\Golden_Update_corrupted.mcs
tcl\script
...\......\create_design.tcl
...\......\design.xdc
...\sources
...\.......\Golden
...\.......\......\Golden_top.vhd
...\.......\......\LED_Display.vhd
...\.......\Update
...\.......\......\LED_Display.vhd
...\.......\......\Update_top.vhd
vivado\Golden
......\......\Golden.cache
......\......\............\compile_simlib
......\......\............\wt
......\......\............\..\java_command_handlers.wdf
......\......\............\..\synthesis.wdf
......\......\............\..\synthesis_details.wdf
......\......\............\..\webtalk_pa.xml
......\......\Golden.hw
......\......\.........\Golden.lpr
......\......\.........\hw_1
......\......\.........\....\hw.xml
......\......\.........\....\wave
......\......\.........\....\xc7vx485t_0
......\......\.........\....\...........\dashboard
......\......\.........\....\...........\.........\XADC.xml
......\......\Golden.runs
......\......\...........\.jobs
......\......\...........\.....\vrs_config_1.xml
......\......\...........\.....\vrs_config_2.xml
......\......\...........\.....\vrs_config_3.xml
......\......\...........\.....\vrs_config_4.xml
......\......\...........\.....\vrs_config_5.xml
......\......\...........\.....\vrs_config_6.xml
......\......\...........\clk_200MHZ_synth_1
......\......\...........\..................\.vivado.begin.rst
......\......\...........\..................\.vivado.end.rst
......\......\...........\..................\.Vivado_Synthesis.queue.rst
......\......\...........\..................\.Xil
......\......\...........\..................\....\clk_200MHZ_propImpl.xdc
......\......\...........\..................\clk_200MHZ.dcp
......\......\...........\..................\clk_200MHZ.tcl
......\......\...........\..................\clk_200MHZ.vds
......\......\...........\..................\clk_200MHZ_utilization_synth.pb
......\......\...........\..................\clk_200MHZ_utilization_synth.rpt
......\......\...........\..................\dont_touch.xdc
......\......\...........\..................\gen_run.xml
......\......\...........\..................\htr.txt
......\......\...........\..................\ISEWrap.js
......\......\...........\..................\ISEWrap.sh
......\......\...........\..................\project.wdf
......\......\...........\..................\rundef.js
......\......\...........\..................\runme.bat
......\......\...........\..................\runme.log
......\......\...........\..................\runme.sh
......\......\...........\..................\vivado.jou
......\......\...........\..................\vivado.pb
......\......\...........\impl_1
......\......\...........\......\.init_design.begin.rst
......\......\...........\......\.init_design.end.rst
......\......\...........\......\.opt_design.begin.rst
......\......\...........\......\.opt_design.end.rst
......\......\...........\......\.place_design.begin.rst
......\......\...........\......\.place_design.end.rst
......\......\...........\......\.route_design.begin.rst
......\......\...........\......\.route_design.end.rst
......\......\...........\......\.vivado.begin.rst
......\......\...........\......\.vivado.end.rst
......\......\...........\......\.Vivado_Implementation.queue.rst
......\......\...........\......\.write_bitstream.begin.rst
......\......\...........\......\.write_bitstream.end.rst
......\......\...........\......\.Xil
......\......\...........\......\gen_run.xml
......\......\...........\......\Golden.bit
......\......\...........\......\Golden.hwdef
......\......\...........\......\Golden.sysdef
......\......\...........\......\Golden.tcl
......\......\...........\......\Golden.vdi
......\......\...........\......\Golden_5356.backup.vdi
......\......\...........\......\Golden_clock_utilization_routed.rpt
....
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