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  • Category : VHDL-FPGA-Verilog
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  • Update : 2017-02-23
  • Size : 3.14mb
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Introduction - If you have any usage issues, please Google them yourself
Perfectly realize serial communication between FPGA and PC (8 message transmission only)
Packet file list
(Preview for download)


UART\bps_rx.bsf
....\bps_rx.v
....\bps_rx.v.bak
....\bps_tx.bsf
....\bps_tx.v
....\bps_tx.v.bak
....\control_rx.bsf
....\control_rx.v
....\control_rx.v.bak
....\control_tx.bsf
....\control_tx.v
....\control_tx.v.bak
....\db\.cmp.kpt
....\..\logic_util_heursitic.dat
....\..\prev_cmp_UART.qmsg
....\..\UART.asm.qmsg
....\..\UART.asm.rdb
....\..\UART.asm_labs.ddb
....\..\UART.cbx.xml
....\..\UART.cmp.bpm
....\..\UART.cmp.cdb
....\..\UART.cmp.hdb
....\..\UART.cmp.idb
....\..\UART.cmp.logdb
....\..\UART.cmp.rdb
....\..\UART.cmp_merge.kpt
....\..\UART.cycloneive_io_sim_cache.45um_ff_1200mv_0c_fast.hsd
....\..\UART.cycloneive_io_sim_cache.45um_ss_1200mv_0c_slow.hsd
....\..\UART.cycloneive_io_sim_cache.45um_ss_1200mv_85c_slow.hsd
....\..\UART.db_info
....\..\UART.eda.qmsg
....\..\UART.fit.qmsg
....\..\UART.hier_info
....\..\UART.hif
....\..\UART.ipinfo
....\..\UART.lpc.html
....\..\UART.lpc.rdb
....\..\UART.lpc.txt
....\..\UART.map.ammdb
....\..\UART.map.bpm
....\..\UART.map.cdb
....\..\UART.map.hdb
....\..\UART.map.kpt
....\..\UART.map.logdb
....\..\UART.map.qmsg
....\..\UART.map.rdb
....\..\UART.map_bb.cdb
....\..\UART.map_bb.hdb
....\..\UART.map_bb.logdb
....\..\UART.pplq.rdb
....\..\UART.pre_map.hdb
....\..\UART.pti_db_list.ddb
....\..\UART.root_partition.map.reg_db.cdb
....\..\UART.routing.rdb
....\..\UART.rtlv.hdb
....\..\UART.rtlv_sg.cdb
....\..\UART.rtlv_sg_swap.cdb
....\..\UART.sgdiff.cdb
....\..\UART.sgdiff.hdb
....\..\UART.sld_design_entry.sci
....\..\UART.sld_design_entry_dsc.sci
....\..\UART.smart_action.txt
....\..\UART.sta.qmsg
....\..\UART.sta.rdb
....\..\UART.sta_cmp.8_slow_1200mv_85c.tdb
....\..\UART.tiscmp.fastest_slow_1200mv_0c.ddb
....\..\UART.tiscmp.fastest_slow_1200mv_85c.ddb
....\..\UART.tiscmp.fast_1200mv_0c.ddb
....\..\UART.tiscmp.slow_1200mv_0c.ddb
....\..\UART.tiscmp.slow_1200mv_85c.ddb
....\..\UART.tis_db_list.ddb
....\..\UART.tmw_info
....\..\UART.vpr.ammdb
....\incremental_db\compiled_partitions\UART.db_info
....\..............\...................\UART.root_partition.cmp.ammdb
....\..............\...................\UART.root_partition.cmp.cdb
....\..............\...................\UART.root_partition.cmp.dfp
....\..............\...................\UART.root_partition.cmp.hdb
....\..............\...................\UART.root_partition.cmp.logdb
....\..............\...................\UART.root_partition.cmp.rcfdb
....\..............\...................\UART.root_partition.map.cdb
....\..............\...................\UART.root_partition.map.dpi
....\..............\...................\UART.root_partition.map.hbdb.cdb
....\..............\...................\UART.root_partition.map.hbdb.hb_info
....\..............\...................\UART.root_partition.map.hbdb.hdb
....\..............\...................\UART.root_partition.map.hbdb.sig
....\..............\...................\UART.root_partition.map.hdb
....\..............\...................\UART.root_partition.map.kpt
....\..............\README
....\output_files\UART.asm.rpt
....\............\UART.done
....\............\UART.eda.rpt
....\............\UART.fit.rpt
....\............\UART.fit.smsg
....\............\UART.fit.summary
....\............\UART.flow.rpt
....\............\UART.jdi
....\............\UART.map.rpt
....\............\UART.map.smsg
....\............\UART.map.summary
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