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SPI_TEST

  • Category : VHDL-FPGA-Verilog
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  • Update : 2017-03-02
  • Size : 15.61mb
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  • Author :zhu****
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Introduction - If you have any usage issues, please Google them yourself
SPI Verilog Code, Master and Slaver.
Packet file list
(Preview for download)


SPI_TEST\SPI_TEST.cache\wt\java_command_handlers.wdf
........\..............\..\project.wpc
........\..............\..\synthesis.wdf
........\..............\..\synthesis_details.wdf
........\..............\..\webtalk_pa.xml
........\..............\..\xsim.wdf
........\.........hw\SPI_TEST.lpr
........\.........ip_user_files\README.txt
........\.........runs\.jobs\vrs_config_1.xml
........\.............\.....\vrs_config_10.xml
........\.............\.....\vrs_config_11.xml
........\.............\.....\vrs_config_12.xml
........\.............\.....\vrs_config_13.xml
........\.............\.....\vrs_config_14.xml
........\.............\.....\vrs_config_15.xml
........\.............\.....\vrs_config_2.xml
........\.............\.....\vrs_config_3.xml
........\.............\.....\vrs_config_4.xml
........\.............\.....\vrs_config_5.xml
........\.............\.....\vrs_config_6.xml
........\.............\.....\vrs_config_7.xml
........\.............\.....\vrs_config_8.xml
........\.............\.....\vrs_config_9.xml
........\.............\impl_1\.stop.rst
........\.............\......\gen_run.xml
........\.............\......\htr.txt
........\.............\......\ISEWrap.js
........\.............\......\ISEWrap.sh
........\.............\......\project.wdf
........\.............\......\rundef.js
........\.............\......\runme.bat
........\.............\......\runme.sh
........\.............\......\spi_master.tcl
........\.............\synth_1\.stop.rst
........\.............\.......\gen_run.xml
........\.............\.......\htr.txt
........\.............\.......\ISEWrap.js
........\.............\.......\ISEWrap.sh
........\.............\.......\rundef.js
........\.............\.......\runme.bat
........\.............\.......\runme.log
........\.............\.......\runme.sh
........\.............\.......\spi_master.dcp
........\.............\.......\spi_master.tcl
........\.............\.......\spi_master.vds
........\.............\.......\spi_master_utilization_synth.pb
........\.............\.......\spi_master_utilization_synth.rpt
........\.............\.......\vivado.jou
........\.............\.......\vivado.pb
........\.........sim\sim_1\behav\compile.bat
........\............\.....\.....\compile.log
........\............\.....\.....\elaborate.bat
........\............\.....\.....\elaborate.log
........\............\.....\.....\glbl.v
........\............\.....\.....\simulate.bat
........\............\.....\.....\simulate.log
........\............\.....\.....\spi_tb.tcl
........\............\.....\.....\spi_tb_behav.wdb
........\............\.....\.....\spi_tb_vlog.prj
........\............\.....\.....\webtalk.jou
........\............\.....\.....\webtalk.log
........\............\.....\.....\webtalk_14328.backup.jou
........\............\.....\.....\webtalk_14328.backup.log
........\............\.....\.....\xelab.pb
........\............\.....\.....\.sim.dir\spi_tb_behav\Compile_Options.txt
........\............\.....\.....\........\............\TempBreakPointFile.txt
........\............\.....\.....\........\............\webtalk\.xsim_webtallk.info
........\............\.....\.....\........\............\.......\usage_statistics_ext_xsim.html
........\............\.....\.....\........\............\.......\usage_statistics_ext_xsim.xml
........\............\.....\.....\........\............\xsim.dbg
........\............\.....\.....\........\............\xsim.mem
........\............\.....\.....\........\............\xsim.reloc
........\............\.....\.....\........\............\xsim.rtti
........\............\.....\.....\........\............\xsim.svtype
........\............\.....\.....\........\............\xsim.type
........\............\.....\.....\........\............\xsim.xdbg
........\............\.....\.....\........\............\xsimcrash.log
........\............\.....\.....\........\............\xsimk.exe
........\............\.....\.....\........\............\xsimkernel.log
........\............\.....\.....\........\xil_defaultlib\glbl.sdb
........\............\.....\.....\........\...
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