ADC12d1600 Verilog

adc12d1600_ok\proj\adc12d1800\adc12d1800.gise
.............\....\..........\adc12d1800.xise
.............\....\..........\adc_verif.bgn
.............\....\..........\adc_verif.bit
.............\....\..........\adc_verif.bld
.............\....\..........\adc_verif.cmd_log
.............\....\..........\adc_verif.cpj
.............\....\..........\adc_verif.drc
.............\....\..........\adc_verif.lso
.............\....\..........\adc_verif.ncd
.............\....\..........\adc_verif.ngc
.............\....\..........\adc_verif.ngd
.............\....\..........\adc_verif.ngr
.............\....\..........\adc_verif.pad
.............\....\..........\adc_verif.par
.............\....\..........\adc_verif.pcf
.............\....\..........\adc_verif.prj
.............\....\..........\adc_verif.ptwx
.............\....\..........\adc_verif.stx
.............\....\..........\adc_verif.syr
.............\....\..........\adc_verif.twr
.............\....\..........\adc_verif.twx
.............\....\..........\adc_verif.unroutes
.............\....\..........\adc_verif.ut
.............\....\..........\adc_verif.xpi
.............\....\..........\adc_verif.xst
.............\....\..........\adc_verif_201512241435.cpj
.............\....\..........\adc_verif_bitgen.xwbt
.............\....\..........\adc_verif_envsettings.html
.............\....\..........\adc_verif_guide.ncd
.............\....\..........\adc_verif_map.map
.............\....\..........\adc_verif_map.mrp
.............\....\..........\adc_verif_map.ncd
.............\....\..........\adc_verif_map.ngm
.............\....\..........\adc_verif_map.xrpt
.............\....\..........\adc_verif_ngdbuild.xrpt
.............\....\..........\adc_verif_pad.csv
.............\....\..........\adc_verif_pad.txt
.............\....\..........\adc_verif_par.xrpt
.............\....\..........\adc_verif_summary.html
.............\....\..........\adc_verif_summary.xml
.............\....\..........\adc_verif_usage.xml
.............\....\..........\adc_verif_xst.xrpt
.............\....\..........\ipcore_dir\adc_mmcm\clk_wiz_v3_6_readme.txt
.............\....\..........\..........\........\doc\clk_wiz_v3_6_readme.txt
.............\....\..........\..........\........\...\clk_wiz_v3_6_vinfo.html
.............\....\..........\..........\........\...\pg065_clk_wiz.pdf
.............\....\..........\..........\........\example_design\adc_mmcm_exdes.ucf
.............\....\..........\..........\........\..............\adc_mmcm_exdes.v
.............\....\..........\..........\........\..............\adc_mmcm_exdes.xdc
.............\....\..........\..........\........\implement\implement.bat
.............\....\..........\..........\........\.........\implement.sh
.............\....\..........\..........\........\.........\planAhead_ise.bat
.............\....\..........\..........\........\.........\planAhead_ise.sh
.............\....\..........\..........\........\.........\planAhead_ise.tcl
.............\....\..........\..........\........\.........\planAhead_rdn.bat
.............\....\..........\..........\........\.........\planAhead_rdn.sh
.............\....\..........\..........\........\.........\planAhead_rdn.tcl
.............\....\..........\..........\........\.........\xst.prj
.............\....\..........\..........\........\.........\xst.scr
.............\....\..........\..........\........\simulation\adc_mmcm_tb.v
.............\....\..........\..........\........\..........\functional\simcmds.tcl
.............\....\..........\..........\........\..........\..........\simulate_isim.bat
.............\....\..........\..........\........\..........\..........\simulate_isim.sh
.............\....\..........\..........\........\..........\..........\simulate_mti.bat
.............\....\..........\..........\........\..........\..........\simulate_mti.do
.............\....\..........\..........\........\..........\..........\simulate_mti.sh
.............\....\..........\..........\........\..........\..........\simulate_ncsim.sh
.............\....\..........\..........\........\..........\..........\simulate_

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