Using the Altera chip prepared under the quartus2 verliog program, change the program for the DA chip ADC0804 driver, and the sampling value of the reality in the digital tube. The program is modular and can be called directly.

ADC0804\ADC0804.asm.rpt
.......\ADC0804.done
.......\ADC0804.fit.rpt
.......\ADC0804.fit.smsg
.......\ADC0804.fit.summary
.......\ADC0804.flow.rpt
.......\ADC0804.map.rpt
.......\ADC0804.map.smsg
.......\ADC0804.map.summary
.......\ADC0804.merge.rpt
.......\ADC0804.pin
.......\ADC0804.pof
.......\ADC0804.qpf
.......\ADC0804.qsf
.......\ADC0804.qws
.......\ADC0804.sim.rpt
.......\ADC0804.sof
.......\ADC0804.tan.rpt
.......\ADC0804.tan.summary
.......\ADC0804.v
.......\ADC0804.v.bak
.......\ADC0804.vwf
.......\ADC0804_assignment_defaults.qdf
.......\db\ADC0804.acvq.rdb
.......\..\ADC0804.analyze_file.qmsg
.......\..\ADC0804.cbx.xml
.......\..\ADC0804.cmp.rdb
.......\..\ADC0804.db_info
.......\..\ADC0804.eco.cdb
.......\..\ADC0804.ipinfo
.......\..\ADC0804.map.qmsg
.......\..\ADC0804.map.rdb
.......\..\ADC0804.map_bb.hdb
.......\..\ADC0804.pplq.rdb
.......\..\ADC0804.pti_db_list.ddb
.......\..\ADC0804.sim_ori.vwf
.......\..\ADC0804.sld_design_entry.sci
.......\..\ADC0804.smart_action.txt
.......\..\ADC0804.tis_db_list.ddb
.......\..\add_sub_lkc.tdf
.......\..\add_sub_mkc.tdf
.......\..\alt_u_div_a5f.tdf
.......\..\alt_u_div_g2f.tdf
.......\..\alt_u_div_mve.tdf
.......\..\logic_util_heursitic.dat
.......\..\lpm_divide_0dm.tdf
.......\..\lpm_divide_35m.tdf
.......\..\lpm_divide_dem.tdf
.......\..\lpm_divide_g6m.tdf
.......\..\lpm_divide_qfm.tdf
.......\..\lpm_divide_t7m.tdf
.......\..\mult_g211.tdf
.......\..\prev_cmp_ADC0804.qmsg
.......\..\sign_div_unsign_4nh.tdf
.......\..\sign_div_unsign_akh.tdf
.......\..\sign_div_unsign_nlh.tdf
.......\..\wed.wsf
.......\db
ADC0804

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