Use ALTERA s FPGA to control SDRAM s verilog program

ex14_SDRAM\datasheet\042174sdr_product_guide_nov_07.pdf
..........\.........\044975sdr_device_operation_jul_06.pdf
..........\.........\299156SDRAM_code.pdf
..........\.........\678733sdr_timing_diagram_feb_04.pdf
..........\.........\ds_k4s64xx32k_rev11.pdf
..........\.........\reference_verilog\README.v
..........\.........\.................\SDRSD50_071010.v
..........\sdram_mdl\datagene.v
..........\.........\.b\add_sub_918.tdf
..........\.........\..\add_sub_gub.tdf
..........\.........\..\add_sub_se8.tdf
..........\.........\..\altsyncram_1lh1.tdf
..........\.........\..\alt_synch_pipe_oc8.tdf
..........\.........\..\alt_synch_pipe_pc8.tdf
..........\.........\..\alt_sync_fifo_0fm.tdf
..........\.........\..\alt_sync_fifo_0oi.tdf
..........\.........\..\a_fefifo_ctc.tdf
..........\.........\..\a_fefifo_htc.tdf
..........\.........\..\a_gray2bin_q4b.tdf
..........\.........\..\a_graycounter_u06.tdf
..........\.........\..\cntr_cta.tdf
..........\.........\..\cntr_kua.tdf
..........\.........\..\dcfifo_35l1.tdf
..........\.........\..\dcfifo_o2l1.tdf
..........\.........\..\dffpipe_gd9.tdf
..........\.........\..\dffpipe_id9.tdf
..........\.........\..\dffpipe_jd9.tdf
..........\.........\..\dpram_6o31.tdf
..........\.........\..\logic_util_heursitic.dat
..........\.........\..\prev_cmp_sdr_test.asm.qmsg
..........\.........\..\prev_cmp_sdr_test.eda.qmsg
..........\.........\..\prev_cmp_sdr_test.fit.qmsg
..........\.........\..\prev_cmp_sdr_test.map.qmsg
..........\.........\..\prev_cmp_sdr_test.qmsg
..........\.........\..\prev_cmp_sdr_test.sta.qmsg
..........\.........\..\sdr_test.ae.hdb
..........\.........\..\sdr_test.asm.qmsg
..........\.........\..\sdr_test.asm.rdb
..........\.........\..\sdr_test.cbx.xml
..........\.........\..\sdr_test.cmp.bpm
..........\.........\..\sdr_test.cmp.cdb
..........\.........\..\sdr_test.cmp.ecobp
..........\.........\..\sdr_test.cmp.hdb
..........\.........\..\sdr_test.cmp.kpt
..........\.........\..\sdr_test.cmp.logdb
..........\.........\..\sdr_test.cmp.rdb
..........\.........\..\sdr_test.cmp0.ddb
..........\.........\..\sdr_test.cmp_merge.kpt
..........\.........\..\sdr_test.db_info
..........\.........\..\sdr_test.eco.cdb
..........\.........\..\sdr_test.eda.qmsg
..........\.........\..\sdr_test.fit.qmsg
..........\.........\..\sdr_test.hier_info
..........\.........\..\sdr_test.hif
..........\.........\..\sdr_test.lpc.html
..........\.........\..\sdr_test.lpc.rdb
..........\.........\..\sdr_test.lpc.txt
..........\.........\..\sdr_test.map.bpm
..........\.........\..\sdr_test.map.cdb
..........\.........\..\sdr_test.map.ecobp
..........\.........\..\sdr_test.map.hdb
..........\.........\..\sdr_test.map.kpt
..........\.........\..\sdr_test.map.logdb
..........\.........\..\sdr_test.map.qmsg
..........\.........\..\sdr_test.map_bb.cdb
..........\.........\..\sdr_test.map_bb.hdb
..........\.........\..\sdr_test.map_bb.logdb
..........\.........\..\sdr_test.pre_map.cdb
..........\.........\..\sdr_test.pre_map.hdb
..........\.........\..\sdr_test.rpp.qmsg
..........\.........\..\sdr_test.rtlv.hdb
..........\.........\..\sdr_test.rtlv_sg.cdb
..........\.........\..\sdr_test.rtlv_sg_swap.cdb
..........\.........\..\sdr_test.sgate.rvd
..........\.........\..\sdr_test.sgate_sm.rvd
..........\.........\..\sdr_test.sgdiff.cdb
..........\.........\..\sdr_test.sgdiff.hdb
..........\.........\..\sdr_test.sld_design_entry.sci
..........\.........\..\sdr_test.sld_design_entry_dsc.sci
..........\.........\..\sdr_test.smart_action.txt
..........\.........\..\sdr_test.smp_dump.txt
..........\.........\..\sdr_test.sta.qmsg
..........\.........\..\sdr_test.sta.rdb
..........\.........\..\sdr_test.sta_cmp.8_slow.tdb
..........\.........\..\sdr_test.syn_hier_info
..........\.........\..\sdr_test.tis_db_list.ddb
..........\.........\..\sdr_test_global_asgn_op.abo
..........\.........\incremental_db\compiled_partitions\sdr_test.root_partition.cmp.atm
..........\.........\..............\...................\sdr_test.root_partition.cmp.cdb
..........\.........\..............\...................\sdr

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