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Location : Home Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
  • Category : VHDL-FPGA-Verilog
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  • Update : 2017-03-30
  • Size : 210kb
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  • Author :lizh*****
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Introduction - If you have any usage issues, please Google them yourself
Verilog is used to display the flow lamp via the SPI protocol.
Packet file list
(Preview for download)


SPI\iseconfig\SPI.projectmgr
...\.........\SPI_1.xreport
...\SPI.gise
...\SPI.xise
...\spi_1.bgn
...\spi_1.bit
...\SPI_1.bld
...\SPI_1.cmd_log
...\spi_1.drc
...\SPI_1.lso
...\SPI_1.ncd
...\SPI_1.ngc
...\SPI_1.ngd
...\SPI_1.ngr
...\SPI_1.pad
...\SPI_1.par
...\SPI_1.pcf
...\SPI_1.prj
...\SPI_1.ptwx
...\SPI_1.stx
...\SPI_1.syr
...\SPI_1.twr
...\SPI_1.twx
...\SPI_1.ucf
...\SPI_1.unroutes
...\SPI_1.ut
...\SPI_1.v
...\SPI_1.xpi
...\SPI_1.xst
...\SPI_1_bitgen.xwbt
...\SPI_1_envsettings.html
...\SPI_1_guide.ncd
...\SPI_1_map.map
...\SPI_1_map.mrp
...\SPI_1_map.ncd
...\SPI_1_map.ngm
...\SPI_1_map.xrpt
...\SPI_1_ngdbuild.xrpt
...\SPI_1_pad.csv
...\SPI_1_pad.txt
...\SPI_1_par.xrpt
...\SPI_1_summary.html
...\SPI_1_summary.xml
...\SPI_1_usage.xml
...\SPI_1_xst.xrpt
...\usage_statistics_webtalk.html
...\webtalk.log
...\webtalk_pn.xml
...\xlnx_auto_0_xdb\cst.xbcd
...\.st\work\hdllib.ref
...\...\....\vlg10\counter.bin
...\...\....\...4A\spi__dac__out.bin
...\...\....\...60\_s_p_i__1.bin
...\_ngo\netlist.lst
...\.xmsgs\bitgen.xmsgs
...\......\map.xmsgs
...\......\ngdbuild.xmsgs
...\......\par.xmsgs
...\......\pn_parser.xmsgs
...\......\trce.xmsgs
...\......\xst.xmsgs
...\xst\dump.xst\SPI_1.prj\ngx\notopt
...\...\........\.........\...\opt
...\...\........\.........\ngx
...\...\........\SPI_1.prj
...\...\work\vlg10
...\...\....\vlg4A
...\...\....\vlg60
...\...\dump.xst
...\...\projnav.tmp
...\...\work
...\ipcore_dir
...\iseconfig
...\xlnx_auto_0_xdb
...\xst
...\_ngo
...\_xmsgs
SPI
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