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sdram_ov7670_vga

  • Category : VHDL-FPGA-Verilog
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  • Update : 2017-04-20
  • Size : 7.48mb
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  • Author :hec***
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Introduction - If you have any usage issues, please Google them yourself
FPGA-based CMOS camera video capture transmission, lcd display.
Packet file list
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sdram_ov7670_vga
................\core
................\....\sdram_pll.bsf
................\....\sdram_pll.ppf
................\....\sdram_pll.qip
................\....\sdram_pll.v
................\dev
................\...\db
................\...\..\.cmp.kpt
................\...\..\altsyncram_mf51.tdf
................\...\..\alt_synch_pipe_d98.tdf
................\...\..\alt_synch_pipe_ud8.tdf
................\...\..\alt_synch_pipe_vd8.tdf
................\...\..\a_gray2bin_6ib.tdf
................\...\..\a_graycounter_1lc.tdf
................\...\..\a_graycounter_577.tdf
................\...\..\cmpr_b66.tdf
................\...\..\dcfifo_4en1.tdf
................\...\..\dcfifo_nen1.tdf
................\...\..\dffpipe_oe9.tdf
................\...\..\dffpipe_pe9.tdf
................\...\..\dffpipe_qe9.tdf
................\...\..\logic_util_heursitic.dat
................\...\..\mux_j28.tdf
................\...\..\prev_cmp_sdram_vga_test.qmsg
................\...\..\sdram_vga_test.asm.qmsg
................\...\..\sdram_vga_test.asm.rdb
................\...\..\sdram_vga_test.asm_labs.ddb
................\...\..\sdram_vga_test.cbx.xml
................\...\..\sdram_vga_test.cmp.bpm
................\...\..\sdram_vga_test.cmp.cdb
................\...\..\sdram_vga_test.cmp.hdb
................\...\..\sdram_vga_test.cmp.idb
................\...\..\sdram_vga_test.cmp.logdb
................\...\..\sdram_vga_test.cmp.rdb
................\...\..\sdram_vga_test.cmp_merge.kpt
................\...\..\sdram_vga_test.cycloneive_io_sim_cache.31um_ff_1200mv_0c_fast.hsd
................\...\..\sdram_vga_test.cycloneive_io_sim_cache.31um_ss_1200mv_0c_slow.hsd
................\...\..\sdram_vga_test.cycloneive_io_sim_cache.31um_ss_1200mv_85c_slow.hsd
................\...\..\sdram_vga_test.db_info
................\...\..\sdram_vga_test.eda.qmsg
................\...\..\sdram_vga_test.fit.qmsg
................\...\..\sdram_vga_test.hier_info
................\...\..\sdram_vga_test.hif
................\...\..\sdram_vga_test.ipinfo
................\...\..\sdram_vga_test.lfp.cdb
................\...\..\sdram_vga_test.lpc.html
................\...\..\sdram_vga_test.lpc.rdb
................\...\..\sdram_vga_test.lpc.txt
................\...\..\sdram_vga_test.map.ammdb
................\...\..\sdram_vga_test.map.bpm
................\...\..\sdram_vga_test.map.cdb
................\...\..\sdram_vga_test.map.hdb
................\...\..\sdram_vga_test.map.kpt
................\...\..\sdram_vga_test.map.logdb
................\...\..\sdram_vga_test.map.qmsg
................\...\..\sdram_vga_test.map.rdb
................\...\..\sdram_vga_test.map_bb.cdb
................\...\..\sdram_vga_test.map_bb.hdb
................\...\..\sdram_vga_test.map_bb.logdb
................\...\..\sdram_vga_test.npp.qmsg
................\...\..\sdram_vga_test.pplq.rdb
................\...\..\sdram_vga_test.pre_map.hdb
................\...\..\sdram_vga_test.pti_db_list.ddb
................\...\..\sdram_vga_test.root_partition.map.reg_db.cdb
................\...\..\sdram_vga_test.routing.rdb
................\...\..\sdram_vga_test.rtlv.hdb
................\...\..\sdram_vga_test.rtlv_sg.cdb
................\...\..\sdram_vga_test.rtlv_sg_swap.cdb
................\...\..\sdram_vga_test.sgate.nvd
................\...\..\sdram_vga_test.sgate_sm.nvd
................\...\..\sdram_vga_test.sgdiff.cdb
................\...\..\sdram_vga_test.sgdiff.hdb
................\...\..\sdram_vga_test.sld_design_entry.sci
................\...\..\sdram_vga_test.sld_design_entry_dsc.sci
................\...\..\sdram_vga_test.smart_action.txt
................\...\..\sdram_vga_test.smp_dump.txt
................\...\..\sdram_vga_test.sta.qmsg
................\...\..\sdram_vga_test.sta.rdb
................\...\..\sdram_vga_test.sta_cmp.8_slow_1200mv_85c.tdb
................\...\..\sdram_vga_test.tiscmp.fastest_slow_1200mv_0c.ddb
................\...\..\sdram_vga_test.tiscmp.fastest_slow_1200mv_85c.ddb
................\...\..\sdram_vga_test.tiscmp.fast_1200mv_0c.ddb
................\...\..\sdram_vga_test.tiscmp.s
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