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  • Category : VHDL-FPGA-Verilog
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  • Update : 2017-05-23
  • Size : 483kb
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Introduction - If you have any usage issues, please Google them yourself
RS232-based serial transmission procedures, the development environment for vivado
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rs232\rs232.cache\wt\java_command_handlers.wdf
.....\...........\..\project.wpc
.....\...........\..\synthesis.wdf
.....\...........\..\synthesis_details.wdf
.....\...........\..\webtalk_pa.xml
.....\......hw\hw_1\hw.xml
.....\........\rs232.lpr
.....\......runs\.jobs\vrs_config_1.xml
.....\..........\.....\vrs_config_10.xml
.....\..........\.....\vrs_config_11.xml
.....\..........\.....\vrs_config_12.xml
.....\..........\.....\vrs_config_13.xml
.....\..........\.....\vrs_config_14.xml
.....\..........\.....\vrs_config_15.xml
.....\..........\.....\vrs_config_16.xml
.....\..........\.....\vrs_config_17.xml
.....\..........\.....\vrs_config_2.xml
.....\..........\.....\vrs_config_3.xml
.....\..........\.....\vrs_config_4.xml
.....\..........\.....\vrs_config_5.xml
.....\..........\.....\vrs_config_6.xml
.....\..........\.....\vrs_config_7.xml
.....\..........\.....\vrs_config_8.xml
.....\..........\.....\vrs_config_9.xml
.....\..........\impl_1\.init_design.begin.rst
.....\..........\......\.init_design.end.rst
.....\..........\......\.opt_design.begin.rst
.....\..........\......\.opt_design.end.rst
.....\..........\......\.place_design.begin.rst
.....\..........\......\.place_design.end.rst
.....\..........\......\.route_design.begin.rst
.....\..........\......\.route_design.end.rst
.....\..........\......\.vivado.begin.rst
.....\..........\......\.vivado.end.rst
.....\..........\......\.Vivado_Implementation.queue.rst
.....\..........\......\.write_bitstream.begin.rst
.....\..........\......\.write_bitstream.end.rst
.....\..........\......\gen_run.xml
.....\..........\......\htr.txt
.....\..........\......\init_design.pb
.....\..........\......\ISEWrap.js
.....\..........\......\ISEWrap.sh
.....\..........\......\opt_design.pb
.....\..........\......\place_design.pb
.....\..........\......\project.wdf
.....\..........\......\route_design.pb
.....\..........\......\rs232.bit
.....\..........\......\rs232.tcl
.....\..........\......\rs232.vdi
.....\..........\......\rs232_3688.backup.vdi
.....\..........\......\rs232_5628.backup.vdi
.....\..........\......\rs232_6036.backup.vdi
.....\..........\......\rs232_6880.backup.vdi
.....\..........\......\rs232_clock_utilization_routed.rpt
.....\..........\......\rs232_control_sets_placed.rpt
.....\..........\......\rs232_drc_opted.rpt
.....\..........\......\rs232_drc_routed.pb
.....\..........\......\rs232_drc_routed.rpt
.....\..........\......\rs232_io_placed.rpt
.....\..........\......\rs232_opt.dcp
.....\..........\......\rs232_placed.dcp
.....\..........\......\rs232_power_routed.rpt
.....\..........\......\rs232_power_summary_routed.pb
.....\..........\......\rs232_routed.dcp
.....\..........\......\rs232_route_status.pb
.....\..........\......\rs232_route_status.rpt
.....\..........\......\rs232_timing_summary_routed.rpt
.....\..........\......\rs232_timing_summary_routed.rpx
.....\..........\......\rs232_utilization_placed.pb
.....\..........\......\rs232_utilization_placed.rpt
.....\..........\......\rundef.js
.....\..........\......\runme.bat
.....\..........\......\runme.log
.....\..........\......\runme.sh
.....\..........\......\usage_statistics_webtalk.html
.....\..........\......\usage_statistics_webtalk.xml
.....\..........\......\vivado.jou
.....\..........\......\vivado.pb
.....\..........\......\vivado_3688.backup.jou
.....\..........\......\vivado_5628.backup.jou
.....\..........\......\vivado_6036.backup.jou
.....\..........\......\vivado_6880.backup.jou
.....\..........\......\write_bitstream.pb
.....\..........\synth_1\.vivado.begin.rst
.....\..........\.......\.vivado.end.rst
.....\..........\.......\.Vivado_Synthesis.queue.rst
.....\..........\.......\.Xil\rs232_propImpl.xdc
.....\..........\.......\gen_run.xml
.....\..........\.......\htr.txt
.....\..........\.......\ISEWrap.js
.....\..........\.......\ISEWrap.sh
.....\..........\.......\project.wdf
.....\..........\.......\rs232.dcp
.....\..........\.......\rs232.tcl
.....\..........\.......\rs232.vds
.....\..........\.......\rs232_utilization_synth.pb
.....\..........\.......\rs232_utilization_synt
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