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  • Category : VHDL-FPGA-Verilog
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  • Update : 2017-07-06
  • Size : 60kb
  • Downloaded :0次
  • Author :hifk2*****
  • About : Nobody
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Introduction - If you have any usage issues, please Google them yourself
This is timer code using VHDL
Packet file list
(Preview for download)
alarm.vhd
count_down.vhd
key_count.vhd
led.vhd
seg_module.vhd
seg_module.vhd.bak
sopc_builder_log.txt
state_m.vhd
timer.asm.rpt
timer.done
timer.dpf
timer.fit.rpt
timer.fit.summary
timer.flow.rpt
timer.map.rpt
timer.map.summary
timer.pin
timer.pof
timer.qpf
timer.qsf
timer.sof
timer.tan.rpt
timer.tan.summary
timer.vhd
timer.vhd.bak
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