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VHDL-FPGA-Verilog
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vga_pingpong
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Category :
VHDL-FPGA-Verilog
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Update : 2017-07-06
Size : 997kb
Downloaded :0次
Author :
湾****
About : Nobody
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Introduction - If you have any usage issues, please Google them yourself
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Development of VGA display based on FPGA
Packet file list
(Preview for download)
part2\download\vga_pong_top.bit
part2\download\vga_pong_top.mcs
part2\project\50MHZ_VGA.V
part2\project\automake.log
part2\project\bitgen.ut
part2\project\gamepad.v
part2\project\pong.v
part2\project\project.dhp
part2\project\project.ise
part2\project\project.ise_ISE_Backup
part2\project\TCGROM.V
part2\project\vga_pong_top.bgn
part2\project\vga_pong_top.bit
part2\project\vga_pong_top.bld
part2\project\vga_pong_top.cel
part2\project\vga_pong_top.cmd_log
part2\project\vga_pong_top.drc
part2\project\vga_pong_top.lfp
part2\project\vga_pong_top.lso
part2\project\vga_pong_top.mrp
part2\project\vga_pong_top.nc1
part2\project\vga_pong_top.ncd
part2\project\vga_pong_top.ngc
part2\project\vga_pong_top.ngd
part2\project\vga_pong_top.ngm
part2\project\vga_pong_top.ngr
part2\project\vga_pong_top.pad
part2\project\vga_pong_top.pad_txt
part2\project\vga_pong_top.par
part2\project\vga_pong_top.pcf
part2\project\vga_pong_top.placed_ncd_tracker
part2\project\vga_pong_top.prj
part2\project\vga_pong_top.routed_ncd_tracker
part2\project\vga_pong_top.stx
part2\project\vga_pong_top.syr
part2\project\vga_pong_top.twr
part2\project\vga_pong_top.twx
part2\project\vga_pong_top.ucf
part2\project\vga_pong_top.ucf.untf
part2\project\vga_pong_top.ut
part2\project\vga_pong_top.v
part2\project\vga_pong_top.xpi
part2\project\vga_pong_top_last_par.ncd
part2\project\vga_pong_top_map.ncd
part2\project\vga_pong_top_map.ngm
part2\project\vga_pong_top_pad.csv
part2\project\vga_pong_top_pad.txt
part2\project\vga_pong_top_summary.html
part2\project\vga_pong_top_vhdl.prj
part2\project\vga_pong_xst.ucf
part2\project\xst\work\hdllib.ref
part2\project\xst\work\vlg33\_bounce__cond.bin
part2\project\xst\work\vlg36\_velocity__x.bin
part2\project\xst\work\vlg37\_velocity__y.bin
part2\project\xst\work\vlg3B\_gamepad.bin
part2\project\xst\work\vlg3C\tcgrom.bin
part2\project\xst\work\vlg48\_d_f_f.bin
part2\project\xst\work\vlg6F\_ball__pos__x.bin
part2\project\xst\work\vlg70\_ball__pos__y.bin
part2\project\xst\work\vlg70\_counter.bin
part2\project\xst\work\vlg73\sync__gen50.bin
part2\project\xst\work\vlg74\_pong.bin
part2\project\xst\work\vlg77\vga__pong__top.bin
part2\project\xst\work\vlg7A\_paddle.bin
part2\project\xst\work\vlg7D\_debounce.bin
part2\project\_impact.cmd
part2\project\_impact.log
part2\project\_ngo\netlist.lst
part2\project\_pace.ucf
part2\project\__projnav\bitgen.rsp
part2\project\__projnav\ednTOngd_tcl.rsp
part2\project\__projnav\nc1TOncd_tcl.rsp
part2\project\__projnav\parentAssignPackagePinsApp_tcl.rsp
part2\project\__projnav\project.gfl
part2\project\__projnav\project_flowplus.gfl
part2\project\__projnav\runXst_tcl.rsp
part2\project\__projnav\sumrpt_tcl.rsp
part2\project\__projnav\vga_pong_top.xst
part2\project\__projnav\vga_pong_top_ncdTOut_tcl.rsp
part2\project\__projnav.log
part2\rtl\50MHZ_VGA.V
part2\rtl\pong.v
part2\rtl\TCGROM.V
part2\rtl\vga_pong_top.ucf
part2\rtl\vga_pong_top.v
part2\project\xst\dump.xst\vga_pong_top.prj\ngx\notopt
part2\project\xst\dump.xst\vga_pong_top.prj\ngx\opt
part2\project\xst\dump.xst\vga_pong_top.prj\ngx
part2\project\xst\dump.xst\vga_pong_top.prj
part2\project\xst\work\vlg33
part2\project\xst\work\vlg36
part2\project\xst\work\vlg37
part2\project\xst\work\vlg3B
part2\project\xst\work\vlg3C
part2\project\xst\work\vlg48
part2\project\xst\work\vlg6F
part2\project\xst\work\vlg70
part2\project\xst\work\vlg73
part2\project\xst\work\vlg74
part2\project\xst\work\vlg77
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