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  • Category : VHDL-FPGA-Verilog
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  • Update : 2017-07-06
  • Size : 154kb
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  • Author :邵*****
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Introduction - If you have any usage issues, please Google them yourself
CMI is designed for m5 random list, which is should in the project, and it can decode it and get the original m5 list
Packet file list
(Preview for download)
CMI\db\m4.asm.qmsg
CMI\db\m4.cbx.xml
CMI\db\m4.cmp.cdb
CMI\db\m4.cmp.hdb
CMI\db\m4.cmp.logdb
CMI\db\m4.cmp.rdb
CMI\db\m4.cmp.tdb
CMI\db\m4.cmp0.ddb
CMI\db\m4.db_info
CMI\db\m4.eco.cdb
CMI\db\m4.eds_overflow
CMI\db\m4.fit.qmsg
CMI\db\m4.fnsim.hdb
CMI\db\m4.fnsim.qmsg
CMI\db\m4.hier_info
CMI\db\m4.hif
CMI\db\m4.map.cdb
CMI\db\m4.map.hdb
CMI\db\m4.map.logdb
CMI\db\m4.map.qmsg
CMI\db\m4.pre_map.cdb
CMI\db\m4.pre_map.hdb
CMI\db\m4.rtlv.hdb
CMI\db\m4.rtlv_sg.cdb
CMI\db\m4.rtlv_sg_swap.cdb
CMI\db\m4.sgdiff.cdb
CMI\db\m4.sgdiff.hdb
CMI\db\m4.sim.cvwf
CMI\db\m4.sim.hdb
CMI\db\m4.sim.qmsg
CMI\db\m4.sim.rdb
CMI\db\m4.simfam
CMI\db\m4.sld_design_entry.sci
CMI\db\m4.sld_design_entry_dsc.sci
CMI\db\m4.syn_hier_info
CMI\db\m4.tan.qmsg
CMI\db\m4.tis_db_list.ddb
CMI\db\m4.tmw_info
CMI\db\prev_cmp_m4.asm.qmsg
CMI\db\prev_cmp_m4.fit.qmsg
CMI\db\prev_cmp_m4.map.qmsg
CMI\db\prev_cmp_m4.qmsg
CMI\db\prev_cmp_m4.sim.qmsg
CMI\db\prev_cmp_m4.tan.qmsg
CMI\db\wed.wsf
CMI\incremental_db\compiled_partitions\m4.root_partition.map.kpt
CMI\incremental_db\README
CMI\m4.asm.rpt
CMI\m4.bdf
CMI\m4.cdf
CMI\m4.done
CMI\m4.dpf
CMI\m4.fit.rpt
CMI\m4.fit.summary
CMI\m4.flow.rpt
CMI\m4.map.rpt
CMI\m4.map.summary
CMI\m4.pin
CMI\m4.pof
CMI\m4.qpf
CMI\m4.qsf
CMI\m4.qws
CMI\m4.sim.rpt
CMI\m4.tan.rpt
CMI\m4.tan.summary
CMI\m4.vwf
CMI\m4_assignment_defaults.qdf
CMI\incremental_db\compiled_partitions
CMI\db
CMI\incremental_db
CMI
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